The Infineon C167CR is probably the leading CAN-equipped 16-bit microcontroller for some time now. Two new 8051 variants have just been released by Infineon which share the CAN peripheral with the C167CR. Thus with the portability of C, much of 16-bit same code may be ported onto an 8 bit micro.

Addressing The CAN Peripheral

The CAN registers are located at 0xF700 and are defined as shown below in this C fragment.

In this case the linker is used to place the xdata segment containing the can variables as follows:

 L51 <object modules> to exec.abs xdata ?xd?can_regs  (0x0F700)

Alternatively the _at_ directive can be used to place each object at an absolute location in the C source code. When defining the CAN symbols it is necessary to use the "#pragma ORDER" directive. This will ensure that the symbols in the structure are assigned in the same physical layout you have defined in the source or else the compiler may adjust the memory assignment for its own ends.

Each message object is also defined by the following C structure.

As the CAN peripheral contains many 16-bit control registers, the 8-bit C500 core must address such registers in a high/low fashion. Thus the 16-bit Upper_Arbitration_Register from the C167CR code must be split into Upper_Arbitration_Register_Lo and Upper_Arbitration_Register_Hi. In all other respects, the configuration of the CAN registers is identical.

Setting Up The CPU And CAN Peripheral

The C5x5-based devices have an additional SYSCON register which controls access to the CAN SFR's and the on chip XRAM. The function of the system control register is given below.

C515C SYSCON Internal Layout

PMOD 	Port 5 mode selection
		PMOD = 0	Quasi bidirectional port structure of port 5 is selected
		PMOD = 1	Bidirectional port structure of port 5 is selected

EALE	Enable ALE output
		EALE = 0	ALE generation is disabled during internal memory access
				enabled for external access
		EALE = 1	ALE generation is enabled

RMAP	SFR map bit
		RMAP = 0	access to non mapped SFR area is enabled
		RMAP = 1	access to mapped SFR area is enabled

XMAP1	XRAM/CAN visible access control
		XMAP1 = 0 	the signals RD/WR are not activated during access 
             to the 	XRAM/CAN controller 
		XMAP1 = 1	ports 0,2 and the signals RD/WR are activated during acceses to the X
          RAM/CAN controller

XMAP0	Global XRAM/CAN controller access enable/disable control
		XMAP = 0	access to the XRAM/CAN controller is enabled
		XMAP = 1	access to the XRAM/CAN controller is disabled

In C, the necessary settings for the XRAM and CAN module are made by:

   SYSCON &= 0xFE ;			// Enable XRAM and CAN controller

The 16-bit upper and lower arbitration registers that set the message ID have to be addressed byte-wise. The following simple functions will take 11-bit IDs and convert them to the format required by the CAN peripheral:

/*** Convert Message IDs Into Values For CAN Peripheral ***/
unsigned char standard_id_hi(unsigned short id) {
   unsigned short temp ;
   temp = ((id<<13) | (id>>3)) ;
   temp /= 256 ; 
   return ((unsigned char) temp);
   }

unsigned char standard_id_lo(unsigned short id) {
   unsigned short temp ;
   temp = ((id<<13) | (id>>3)) ;
   temp &= 0x00FF ;
   return ((unsigned char) temp);
   }

Here are the equivalents for handling 29-bit IDS:

 The baudrate prescaler register contents will vary from that used in the C167CR due to the different clock-generation arangements on the 8-bit devices. The formula of:

(Tq * Fosc)/2 - 1

is unaltered for the C515C but the newer C505C offers the possibility of a removing the divide by 2 to allow 1MB/s to be reached when a low frequency clock is used. The CMOD bit is used.

The basic format of the C167CR code can then be directly reused:

In this example, a 100ms interrupt routine is used to trigger the transmission of data and check if any new messages have arrived. The A-D converter is used as a source of varying data.

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