Automatic conversion of other channels is only possible with the enhancements in the 167, outlined in section 9.8.4.

9.8.3 Over-Voltage Protected Analog Inputs

Despite the genuine 10-bit resolution, the 167's analog inputs can be easily protected against out-of-range voltage inputs as might occur under a fault condition in a real system. Clamping diodes allow a simple series resistor on each analog input to provide a good level of protection against excessive voltage of either polarity.

Unlike many microcontroller A/D converters, the total unadjusted error (TUE) on any input is guaranteed even if an unselected channel has a fault condition voltage of over 5v or under 0v applied to it. Under these conditions, most converters will start to give erroneous readings on other channels, which can have unsafe side-effects as from software, it is very difficult to detect a loss of accuracy. The channel with the fault will read as either 0x0000 or 0x03FF for under- and over-voltages respectively.

The only requirement that must be satisfied to allow the continued correct operation of the fault-free inputs is that the sum total of the fault current flowing into any two unselected analog channels must be less than 10mA. A simple current-limiting resistor can thus prevent the fault affecting other channels.

The series protection resistor (Rap) to be added to the analog inputs can be easily calculated by:

Rap =  (Vmax _ Vcc)/Imax     

Where: Vmax = maximum fault voltage & Imax = maximum permissible current flow

For an automotive application where a common fault condition voltage might be 14v, the series resistor would be around (14v _ 5v)/0.010 = 1K0. Of course, this additional resistance will have to be added to the source resistance of the analog signal source itself and it is important to ensure that the sample time is long enough to guarantee a stable voltage on the sample-and-hold capacitor, as outlined in section 9.8.5.

9.8.4 167/4-Specific Enhancements

- wait-for-ADDAT-read mode

- channel injection

- programmable sampling times

The 167 has some additional modes such as "wait for ADDAT read mode" and "channel injection" mode. The former inhibits further conversions until the last result is read so that unused conversion data is not accidently over-written. The channel injection feature is aimed at allowing analog conversions to be made coincident with some event which is asynchronous to the software execution or the normal operation of the converter. With the ADC being able to automatically scan through a number of channels continuously, making a conversion of a specific channel that is not included in the sequence is taken care of by "Injecting" a conversion by setting the ADCRQ bit. The ADC will finish any conversion that was in progress due to the autoscan mode and make a fresh conversion of

Using The PEC To Automate

Analog Sampling

166 Designer's Guide - Page

the channel specified in the top four bits of ADDAT2 and placing the result in the lower 10- bits of the same register. The autoscan process then resumes. The user must ensure that the wait-for ADDAT-read mode is activated.

The most important use of the injection mode is to make a conversion of a specified channel in response to a level transition on the CC31 port pin (P7.7). Typical examples of where this is useful are the crankshaft-synchronised reading of the inlet manifold pressure in an engine management system or the reading of current in the windings of a motor drive at a specific rotor angle.

9.8.5 Matching The A/D Inputs To Signal Sources

It is possible to alter the apparent input resistance of the analog inputs to allow a better match to the internal resistance of the signal source that is driving them. Sources that change rapidly and that are to be read frequently require a fast conversion time but this will reduce the time available to charge the sample-and-hold (SAH) capacitor in the A/D convertor itself. Thus such signal sources must have a low internal resistance if the voltage level on the sample-and-hold capacitor is to be fully charged and stable by the time the conversion begins. If the signal can be converted more slowly this requirement is relaxed as the sampling time can be set to a larger value. Thus the internal resistance of the source can be greater without loss of accuracy.

Of course, extending the sampling time does not physically alter the input resistance as it is always several megohms. As the sample-and-hold appears to be a simple RC filter whose series resistor is the internal resistance of the source, it is just a matter of making sure that there is sufficient current drive in the signal source to charge up the sampling capacitor before the conversion begins.

The user must also consider the internal resistance of the analog reference voltage source applied to the Varef pin on the 167. Again, the reference voltage source must be able to fully charge the input capacitance of this pin within one conversion clock period.

The ADCTC and ADSTC bits in the ADCON A/D converter control register allow the user to easily alter the rate at which the converter hardware is clocked and thus the length of the sampling time (for SAH capacitor charging) and the conversion phase. The basic timing of the A/D unit is the conversion clock and as the sampling clock is derived from this, the choice of sampling and conversion time is not unlimited. The next table gives the possible legal combinations of conversion and sampling times with the maximum signal and reference internal resistances that are acceptable in each case.

Analog To Digital Convertor Voltage Sources And Resistances

166 Designer's Guide - Page

Default Configuration

At CPU Clock = 20MHz

It can be seen that at the (default) fastest combined sampling and conversion time of 9.7us, the signal source resistance must be less than 3K3 Ohms to ensure complete charging of the sampling capacitor. At the other extreme, with a sampling time of 38.4us (resulting in an overall conversion time of 72.1us), the source resistance can be up to 116K. If a series protection resistor is being used, the figure in the table for the signal source resistance must be reduced by the resistor's value as it is effectively in series with the source's own internal resistance.

As these timing characteristics are programmable on-the-fly in software, it is entirely possible to make special settings to the ADCTC and ADSTC bits prior to the conversion of any channel which has a much higher source internal resistance than the others. Note that all timings are reduced by 20% at a CPU clock of 25MHz.

9.8.6 165/3

6-bit Schmitt-trigger digital input port. This type of input is useful where the input signal is noisy or changes very slowly from 0 to 5v as the Schmitt-trigger introduces hysteresis.

P5.10 - (167) Schmitt input Timer6 direction P5.13 - (167) Schmitt input Timer5 count input

P5.11 - (167) Schmitt input Timer5 direction P5.14 - (167) Schmitt input Timer4 direction

P5.12 - (167) Schmitt input Timer6 count input P5.15 - (167) Schmitt input Timer2 direction

9.9 Port 6 (167)

General purpose bi-directional I/O port with push-pull or open drain outputs which are also chip select lines for memory decoding and external device enabling. The number of pins to be used as chip selects is set by the P0 configuration resistors - see section 1.5.

P6.0 - Port 6.0/Chip select 0 P6.3 - Port 6.3/Chip select 3

P6.1 - Port 6.1/Chip select 1 P6.4 - Port 6.4/Chip select 4

P6.2 - Port 6.2/Chip select 2

9.10 Port 7 (167 Only)

General purpose bi-directional I/O port with push-pull or open-drain outputs. Also input/output pins for second capture compare unit, channels 28 to 31.

P7.0 - Port 7.0/hi-res PWM module channel 0 output P7.4 - Port 7.4/CAPCOM (unit 2) channel 28

P7.1 - Port 7.1/hi-res PWM module channel 1 output P7.5 - Port 7.5/CAPCOM (unit 2) channel 29

P7.2 - Port 7.2/hi-res PWM module channel 2 output P7.6 - Port 7.6/CAPCOM (unit 2) channel 30

P7.3 - Port 7.3/hi-res PWM module channel 3 output P7.7 - Port 7.7/CAPCOM (unit 2) channel 31

Default Configuration

At CPU Clock = 20MHz

Tuning The ADC

To Your Hardware

166 Designer's Guide - Page

50ns PWM Module/High Resolution Digital To Analog Convertor

Besides the 32 potential PWMs formed from the two CAPCOM units on the 167, there are four additional dedicated PWM channels on port 7. These are very simple to configure, having just a period register and a duty ratio register. The carrier frequencies can be much higher than those obtainable from the CAPCOM unit. Typically 78kHz can be achieved at an 8-bit resolution, edge-aligned PWM. This reduces to 39kHz in 8-bits, centre-aligned mode. Each extra bit of resolution will halve the carrier frequency.

The inclusion of a shadow register means that the updating of the duty ratio registers to modulate the PWM can be done from a simple interrupt service routine at the overflow point of the PWM module timer while still allowing a 0-100% duty ratio.

9.11 Port 8 (167 Only)

General purpose bi-directional I/O port with push-pull or open drain outputs. Also input/ouput pins for second capture compare unit, channels 16 to 23.

P8.0 - Port 8.0/CAPCOM (unit 2) channel 16 P8.4 - Port 8.4/CAPCOM (unit 2) channel 20

P8.1 - Port 8.1/CAPCOM (unit 2) channel 17 P8.5 - Port 8.5/CAPCOM (unit 2) channel 21

P8.2 - Port 8.2/CAPCOM (unit 2) channel 18 P8.6 - Port 8.6/CAPCOM (unit 2) channel 22

P8.3 - Port 8.3/CAPCOM (unit 2) channel 19 P8.7 - Port 8.7/CAPCOM (unit 2) channel 23

9.12 Summary Of Port Pin Interrupt Capabilities

9.12.1 Interrupts From Port Pins

The 166 family can generate interrupts from dual-function port pins on rising, falling or both edges. The pins are scanned every 400ns (20MHz clock). Thus it will take a maximum of 400ns for the 166 to detect the interrupt request. On the 167, port 2.8-2.15 provides 8 fast interrupt pins that are scanned every 50ns. The latency times of 6 to 12 state times (300-600ns) must be added to this for the time from an edge arriving at a pin to the interrupt vector being executed.

It is possible to create 50ns resolution interrupt inputs on the 166 by ganging together the bottom 8 pins of P2. A 100ns resolution would require 4 pins and 200ns just two. This enhanced scan rate is achieved as a result of the CAPCOM unit scanning its 8 pins every 400ns. Thus by ganging pins together the effective scan rate can be increased. The CAPIN pin on GPT2 has a 200ns scan time.

9.12.2 166 Variants

The basic 166 device can trigger interrupts on rising, falling or both edges on 21 pins. It should be born in mind that the core is easily fast enough to service all of these.

9.12.3 167 Variants

The 144 pin 167 can generate interrupts from up to 37 pins, depending on the bus mode being used.

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9.13 Typical 166 Family Applications

Here are some applications in which we know the 166 family is being used. In almost every case, the family was selected for one or more of the following reasons:

Very high processing performance in C Large number of IO pins

Large number of interrupt pins Up to 32 capture and compare pins

High resolution PWM generators Part 2.0B CAN peripheral

PEC DMA controller No microcoded TPU!

Close coupled core and peripherals Very low current consumption per MIPs

Low EMC emissions Some variants are second-sourced

Note: In cases where there were specific reasons for selection that we know of, they are given.

9.13.1 Automotive Applications

Formula One engine management and gearbox control systems - High CPU performance allowed innovative control algorithms. Close coupled CPU with 16 channel CAPCOM unit. Ease using BREQ/HOLD/HOLDA to share common RAM in dual processor system.

Indy car engine management systems - Entire program could be in C language without losing performance, including high speed interrupt sections - previous project abandoned due to difficulty in altering TPU programming in CISC CPU. Availability of part 2.0B CAN peripheral. Quality of development tools. High level of support from Hitex.

Touring car engine management - Ease of programming as entire program in C. Close coupling of CAPCOM to CPU simplified program design. Deterministic interrupt latency times.

Low-volume prestige car engine management system - Ease of programming as entire program in C. Close coupling of CAPCOM to CPU simplified program design. Previous project compromised by difficulty in applying TPU. Part 2.0B CAN interface.

Competition ignition systems

Diesel unit injector control

Diesel injection pump control - Ease of programming an entire program in C. Close coupling of CAPCOM to CPU simplified program design. Part 2.0B CAN interface. Second sourced part. Very high CPU performance and I/O pin count, flexible bus interface, in-circuit reprogrammability via bootstrap loader, low cost in volume, high integration, low power consumption, quality of development tools.. High level of support from Hitex.

Petrol engine management systems

Marine diesel engine regulators - Flexibility of peripherals, outright CPU performance, ease of programming in C, I/O pin count, flexible bus interface, part 2.0B CAN peripheral, compatible with very low cost versions like C161.

Active suspension control

Anti-lock braking systems - Large number of frequency-measuring inputs, high CPU performance, deterministic interrupt response, high resolution PWM unit, part 2.0B CAN peripheral.

Electronically-assisted power steering controller - Near DSP performance, high I/O pin count, 32 channels of capture and compare, part 2.0B CAN, ease of programming, second sourced part.

9.13.2 Industrial Control Applications

AC induction motor drives (vector control) - Near DSP performance at low cost, flexible sinewave synthesis via CAPCOM unit, full vector control possible.

AC induction motor drives (open loop) - Low cost, high integration, ease of sinewave synthesis via CAPCOM, in-circuit reprogrammability of FLASH EPROM.

Linear induction motor control - Easy waveform generation via CAPCOM unit.

DC brushless motor control - High CPU performance, simple commutation via angle-driven CAPCOM unit, non-intrusive PEC update of switching points.

C Programmable logic controllers (PLC) - High performance in C, simplicity of bus design, ease of interfacing to LCD panels, low CPU cost.

High speed packaging machines - Very high CPU and CAPCOM performance, peripheral event controller allows non-intrusive drive of CAPCOM, low cost for performance, high I/O pin count.

Bottling line barcode printers - Very fast conversion of ASCII text to bitmap images using C, non-intrusive PEC transfer of image data to inkjet printhead on synchronous serial port, high I/O pin count, low cost.

High speed gluespotting machines - Very high CPU performance in C allows major calculations in interrupts, ease of CAPCOM programming, ease of synchronising CAPCOM unit to shaft encoder.

Cigarette rolling and packaging machines - Very high CPU performance, ease of coupling CAPCOM to rotating shafts, ease of coupling CAPCOM to solenoids, high resolution PWM module, part 2.0B CAN.

Printing press controls -Multi-channel pulse measurement and generation via CAPCOM, automatic angle-to-time domain conversion in CAPCOM, part 2.0B CAN, very high CPU performance, PWM module.

Cotton carding machine controls

166 Designer's Guide - Page

Power inverter controllers

Elevator controls

Networked security systems

Easy creation of 8 software UARTs via CAPCOM, part 2.0B CAN peripheral, high quality development tools.

Intelligent CCTV security system - Real time synchronisation to lines, 1us sampling and PEC transfer of data into RAM array, very high CPU performance.

9.13.3 Telecommuncations Applications

Modem concentrators - Easy upgrade from 8032, large address space, fast context switch, easy multi-tasking, low cost; UART, ease of implementing software UARTs.

ISDN terminal equipment - 5x higher performance than 16-bit 8051 at same price, high pin count, compatibility of C compiler to C51.

Mobile radio base stations - High I/O pin count, low EMC emissions.

GSM cellphone handsets - Low current consumption, fast context switch.

ISDN test gear - Easy 33 bit period measurement, high CPU performance, low current consumption-per-instruction-per-second.

Internet server cooling supervisors - High accuracy A/D convertor, ability to drive 4x three-phase motors from dual CAPCOM unit.

Profibus interfaces

CAN to PC interfaces - Easy implementation of master-slave ISA bus interface, part 2.0B CAN peripheral.

PCMCIA CAN interface card - Very small package size, low power consumption, very high CPU performance, UART.

9.13.4 Transport Applications

Marine radar systems - Very high integration, very high CPU performance allows tracking of 24 targets, easy interface to VGA graphics, easy frequency lock to GPS markers, lower cost family members available.

Aviation power bus management

Marine positioning and navigation systems - Easy upgrade from 8032, very good floating point performance in C, quality of development tools.

Networked traffic signal controllers

Bus ticketing systems

Taxi meters

9.13.5 Consumer Applications

Lighting desk controls - Easy 250kbit/s UART, high I/O pin count, 28 PWM channels on CAPCOM, ease of programming in C, 16 channel A/D convertor.

Audio mixing desks

Video recorder servo controller

Hard disk drive controllers - Deterministic interrupt latency, high CPU performance, interrupt structure, low cost.

TV test gear and pattern generators - ease of synchronising to line sync. pulses and pulse generation via CAPCOM. High CPU performance allows useful processing within line.

TV mixing desks

TV standards converters - ease of synchronising to line sync. pulses. PEC capture of incoming lines to array and high CPU performance.

Scanning electron microscopes

High voltage precision power supplies - low cost, ease of interfacing to large memory areas, simultaneous mixed 8- and 16-bit busses.

PCMCIA modem interface (165 inside card)

PCMCIA CAN interface (165 inside card) - high CPU performance required to process 1MB/s CAN data.

Inkjet printer controller - high CPU performance for fast bitmap imaging, PEC transfer to synchronous port, low cost.

9.13.6 Instrumentation Applications

Hand held vibration analyser (battery powered) - very low current consumption, high throughput per milliamp, bootstrap loading of FLASH program.

Hand held non-destructive testers (battery powered) - high performance per milliamp, 33 period measurement with GPT2, SPI via synchronous port.

Hand held sound level meters (battery powered) - high performance for power consumed, accurate A/D converter, on-chip FLASH EPROM is in-circuit programmable.

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10. 166 Compatibility With Other Architectures

The 166 has an original RISC-like core design that is not derived from an older architecture such as 8086. This means that it is not possible to execute, for example, 8051 binary code directly. There is a code translator utility available which will take in 8051 assembly programs and emit A166 source files. However, the fact that the most popular 8051 C compiler manufacturer also produces a 166 compiler, means that the port to the 166 is not particularly difficult if program is in C. Of course the peripherals are different but do have some similarities, which at least makes the job feasible.

The bus interface of the 166 and 8051 can be quite different but if the 8-bit multiplexed or non-multiplexed modes are used, it is suprisingly easy to hook a 161 into an 8032 design. In fact the resulting design may be simpler due to the elimination of the address latch which is redundant due to the 161's non-multiplexed bus. The following shows how a 161 can be literally wired into an 8032 socket - further details on this are available from Hitex. This was a complex case as the old 8032 design had been stretched over the years to add more and more EPROM, using bank-switching. The change had to be made to 16-bits as the 8032 simply could not execute the vast amount of software fast enough! The 161 version was some 12 times faster, even with an 8-bit bus...

166 Designer's Guide - Page

11. Mounting 166 Family Devices

11.1 Package Types

Like most modern microprocessors, all 166 devices are in packages that are intended for direct surface mounting onto the PCB. The pin pitches range from 0.8mm down to 0.5mm, with pin counts of up to 144. The increasing number of package types being used for 166 family devices are listed in the following table:

CPU Package Type Pin Pitch SMD Socket Yamaichi Part No.

166 P-MQFP-100-2 0.65 mm SOMR100-Y IC149-100-014-S15

165/161RI P-MQFP-100-2 0.65 mm SOMR100-Y IC149-100-014-S15

164 P-MQFP-80-1 0.65 mm SOMQ80-1-Y IC149-080-017-S5

163 P-MQFP-100-2 Low cost Production Socket IC198-1001-210*

165/161RI P-TQFP-100-3 0.50 mm SOTQ100-Y IC149-100-025

167 P-MQFP-144 0.65 mm SOMQ100-Y IC149-144-KS11453-0S

161O/K/V P-MQFP-80-1 0.65 mm SOMQ80-1-Y IC149-080-017-S5

161O/K/V P-MQFP-80-2 0.80 mm SOMQ80-2-Y IC149-080-021-S5

When choosing a suitable socket for your prototype, it is important to note that Yamaichi list at least two different versions of each package. These generally only differ in terms of lead length but it is important to get exactly the right one - the Hitex part numbers given above are correct for the 166 family devices. It is also important to note that the approximation used in some older 0.10" based CAD packages of 0.635mm for the metric 0.65mm will result in an accumulated error of 0.5mm over the length of one side of a 144 pin 167. Finally, you will need to make the CPU pads on the PCB about 0.5mm longer than dictated by the MQFP specification to allow the easy soldering of the socket.

If it is not necessary to have a socket with the same footprint as the CPU, there is a low-cost 144 MQFP socket from AMP which has a PGA pin-out underneath. It is widely used on evaluation boards such as the EVA16C.

Yamaichi MQFP80 Socket

Yamaichi MQFP100 Socket

Yamaichi Low Cost Production Socket

166 Designer's Guide - Page

11.2 Connecting Emulators To 166 Family Devices

11.2.1 Socketed Devices

In the past, first prototypes would have had the CPU fitted in a socket so that it could be easily replaced after accidents and an emulator could be fitted directly. DIL and PLCC sockets are cheap and readily available. Unfortunately the sockets for MQFP and TQFP are relatively expensive and not always easy to find, especially in the 144MQFP format used by the 167. For building development boards they are ideal, as they have the same footprint as the CPUs themselves, so that no board changes are required to fit them. It is advisable to leave 0.2" around the perimeter of the CPU pads as the sockets are somewhat bulkier than the chips.

The socket is an assembly of a base platform with fine contacts around the edge and a clamping ring. There are extensions in the corners with threaded holes to allow the CPU retaining ring to be firmly screwed down. Somewhat confusingly, the Yamaichi sockets are supplied assembled "upside down", so that pegs intended to locate the CPU appear to be postioning studs, designed to fit into holes in the PCB. THIS IS NOT THE CASE - the underside of the CPU platform is flat! The retaining ring must removed to get the real picture. The shape of the contacts is such that it is very difficult to solder them down using even a very fine soldering iron. Solder paste and a hot-air gun are much more likely to be successful!

Yamaichi are the major supplier of these sockets, but local distributors are usually only interested in bulk orders so a request for ones and twos will not get an enthusiastic response! Hitex keeps a small stock of all Yamaichi socket types for emergencies but we have to charge a higher price for them than component specialists.

Finally, the solder-in "stack" or "replace" adapter provides a reliable connection method but requires a rather tall (and expensive) block to be soldered into the CPU's normal position. It is possible to fit a socket to the top of the stack so that the board can be run without the emulator but this then becomes physically very large.

11.2.2 The "PressON" Emulation Connector

Emulation of soldered-down CPUs presents a particular problem as the conventional spring-contact "clip-over" connectors that were reliable with PLCC packages are almost totally useless on the MQFP and TQFP. The job of precisely locating up to 144 small spring-loaded terminals on a 0.5mm pitch is almost impossible. This has made the connecting of an emulator onto a production board with a surface mounted MQFP or TQFP processor is a real challenge.

Hitex has developed a patented new technology based on narrow strips of a novel conductive elastomer that solves the connection problem. This special material is flexible and conducts only in one direction. When pressed firmly against the shoulders of the CPU's pins, it automatically aligns its conducting pathways to an interface board which are then directed to the emulator. All that is required is for the user to temporarily glue a threaded stud to the CPU, allowing the "PressOn" assembly to be clamped securely down by a nut.

11.3 166 Family PCBs

Except in very low clock speed designs or possibly in educational projects, it is essential to use at least a gridded-ground earth plane. It is entirely possible to use a simple double-sided arrangement but it is usually the difficulty of routing up to 144 processor connections that dictates the use of a multi-layer board. At 20MHz though, the demands of low EMC emissions and reliability means that at least a 4-layer or even 6-layer board will be required, with two power planes. It goes without saying that the clock source must be as physically close to the CPU as possible, as should the memory devices. Unless a very large number of devices will be attached to the bus, no external bus drivers should be required. At 10-bits the A/D convertor inputs should be routed well away from the bus, preferably with each one interleaved with guard tracks.

11.4 CAD Symbols

Ready-made ORCAD libraries are available on the Siemens "Applis" CD-ROM to save you the effort of drawing your own symbols. Derivatives like the 165 come in either MQFP or TQFP packages. Be aware that the pinout of the TQFP version has the same pin ordering as the former but is displaced by two pins. Some older databooks do not give the pinout for the TQFP version and some unfortunates have put down pads for the TQFP processor but with the MQFP pin positions. Much track cutting is required to move each of the 100 pins two places to the left. Make sure you use the proper drawing for the package you are using!

166 Designer's Guide - Page

12. Direct PCB Emulation Interfaces For 166 Designs

12.1 The Problem

All new high performance microcontrollers and microprocessors like the 166 family are now released in packages of 100 to 200 pins. Coupled with small size, the pin pitch can as low as 0.5mm, and as the devices are always surface mounted the pins are short. Most projects go straight to a surface mounted prototype with the CPU soldered in, so in-circuit emulation must be performed via clip-overs costing around $500-$800. The 166 family devices have been designed to recognise the presence of the clip-over and subsequently put all pins into a high impedance tri-state, to allow On-Circuit Emulation (ONCE). Thus the soldered-in CPU is dormant.

Older package types such as PQFP have bumpers at the corner on to which clip-over can be anchored quite effectively. Clip-overs for newer package types like the bumperless MQFP rely on sprung contacts being compressed around the perimeter of the device by a sliding locking ring. This is at best temperamental and usually unreliable after extended use. The connectors themselves are easily damaged during storage due to the long and exposed nature of the pins. Clip-overs are by definition sacrificial parts which is unacceptable in view of their high cost. The new PressOn connection method from section 11.2.2 does considerably ease the problem but due to access limitations, even this cannot sometimes be used.

12.2 The ROMless Solution - ICEconnect166

Some existing ROMless 166 users have originated various ways of by-passing the clip-over by bringing the signals required for emulation out on a special connector or additional row of pads around the CPU. Now to try and standardise these clip-overless connection methods, Hitex have defined an emulation interface for the ROMless 166 family which does not involve clipping onto very fine CPU pins. The new interface does not rely on the ONCE mode employed by the existing clip-over as it is the soldered-in CPU which actually performs the emulation. If new 166 users include a Hitex-supplied 2 x 40 way connector with a signal arrangement according to the ICEconnect specification, then a low cost emulation probe can be used. For mass production, the ICEconnect socket is omitted so that the only overhead on the design is a row of pads 35 x 4 mm in area.

By using the soldered-in CPU as the emulation device, a number of other benefits follow such as reduced disturbance of port lines due to there being no extension of signal paths. This is particularly important for A/D convertor inputs as worn clip-overs can quite easily add one or two bits of uncertainty to the 166's 10-bit A/D convertor. The mechanical integrity of the connection is considerably higher than a clip-over and is rated at around 1000 cycles. The ICEconnect socket can be used as an end-of-line test port to allow the bus integrity to be verified. It also allows alternative test code to be presented to the soldered-in CPU, overriding any application code installed on the board. As ICEconnect relies on sampling the external CPU address and data busses, it is only suitable for designs where an external ROM is present. It cannot be used where internal FLASH or OTP ROM is utilized.

The full ICEconnect connector specification is available from Hitex on request.

12.3 The ROM/ROMless Solution - QuadConnect

The major limitation of the ICEconnect method is that it will only work in ROMless 166 family designs. To cope with single-chip 166 versions the QuadConnect approach can be useful. This is similar to ICEconnect but puts the soldered-down CPU into ONCE mode, rather like the PressOn adaptor. All the CPU pins are routed to connectors (either through-hole or surface mount) arranged in two rows parallel to each side of the CPU. This requires some board space. Like the ICEconnect method, the DIL connectors to the emulator probe are only fitted when a board is to be used for development work.

QuadConnect pads layouts have been defined for all 166 family packages and a definitive list can be found on the Hitex "Embedded World" CD-ROM.

QuadConnect Footprint For 128TQFP Packages

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13. Getting New Boards Going

Your new board arrives, fully assembled, with the microcontroller soldered down directly to the board. How do you get it running?

If you have designed your system using the guidelines set out earlier in this publication, then there is a good chance that the system will run straightaway. However experience has shown that it is better to take things one step at a time.

An oscilloscope is really an essential piece of kit when first testing new designs. However a proper in-circuit emulator is perhaps the greatest aid, as it allows you to effectively "sit" inside the CPU and look out across the bus - any bus errors are then obvious and a great deal of time can be saved. However, if you are lucky enough to have an DPROBE167 in-circuit emulator ready and waiting, do not plug it into the hardware straight away and switch on - 166 bond-out chips are delicate and expensive and a major board fault could destroy the emulation device. It is a very good idea to run through the basic checks listed below before jumping in with the emulator! Engineers equipped with the AX166 non-bondout emulators can be a bit more cavalier, as these systems are rather more able to take short-circuits, Vcc on Vss pins etc.. After all, the emulation chips are just off-the-shelf parts!

It is definitely a good idea to check that the bus lines are not shorted to Vcc or Vss before powering up the board. It is also worth running a scope probe around the CPU pins to make sure that there is 5v on all the Vcc pins and 0v on all the Vss and that there are no voltages above 5v on any pin. The analog reference and ground should also be checked as it seems to be quite common for these to be omitted or connected up incorrectly. These latter two points can spell instant damage to the emulation chip in a bondout-type emulator. However, should everything look OK, now would be a good time to plug the ICE into the hardware.

For those without proper equipment, the bootstrap loader mechanism can be very useful for diagnosing hardware faults and Hitex can provide a free bootstrap-loadable diagnostics tool on request. Most initial problems are due to one or more of the reasons examined in the next few sections...

13.1 External Bus Design Pitfalls

166: EBC0 or EBC1 not at correct voltage level for bus mode required. A CPU that comes out of RESET expecting an 8-bit multiplexed bus mode is not going to be much use if it reads 00 on the EBC0 & 1 pins. Also make sure that the /BUSACT pin is grounded if your design is external bus.

167: Make sure that the pull-down resistors on port 0 are correctly installed, as any mistakes here will almost certainly prevent the CPU running properly. If you have done your pull-down resistor calculations properly then, with the 167 held with the /RESIN pin low, there should be around 5v on any bus line that does not have a pull-down resistor and less than 1v on lines that have.

Simple Port Pin Toggling Program!

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If your system has the EPROM socketed, then it is probably worth blowing a simple program into the EPROMs before fitting them to the board. The program need only wave the port 2.0 pin up and down so that something can be seen on the `scope. Make sure that the while(1) { ; } loop that contains the pin toggling code has a few NOPs in it, as if the loop is too small the CPU will simply jump within the instruction pipeline and the bus will appear to be dead. In the event of problems this inactivity could be misleading. If you are using the standard STARTUP.A66 or CSTART.A66 C compiler start-up files, one waitstate will have been programmed. With the 167 it is a good idea to enable the CLKOUT pin so that the real CPU frequency can be measured, in case the PLL is not working correctly.

When the FLASH EPROMs are soldered down you will have to use the bootstrap loader to initially get a program into the board. If at all possible, you should blow a test program into the EPROMs before they are soldered down as trying to program FLASH in-situ via the bootstrap loader on a brand new board, with a possibly unfamiliar CPU, is not easy. Overall it is best to build the first prototypes with socketed EPROMs and processor if at all possible!

Powering up the board for the first time is always a slightly anxious moment. If your board is being powered off a bench power supply, turn the current limit down to say 250mA and wind it up slowly.....apart from the obvious steps of making sure that the current consumption is not excessive and that there is no smoke, some basic steps will have to be taken to confirm that the CPU can run. If you are lucky, putting a `scope onto P2.0 (or whatever your program in EPROM does) should reveal a square wave of around 2MHz. Should you be fortunate to get this, you are not quite home and dry because it is still possible for the program to run if you have the CPU running multiplexed in a non-multiplexed design. If you do not see anything then check the items in the next section. If your EPROMs are empty you ought to check them as well but, ultimately, you will have to use the bootstrap loader to program them.

Is the /RESIN pin high after powering-on? If your reset circuit is working correctly, it should be. If it is not, check the circuit! With the /RESIN pin high, the XTAL1/2 pins should show a clock signal of the frequency expected. With the 167, the amplitude should be around 4v peak to peak if the RESIN pin is high. If it is low, the clock should have an amplitude of around 4.5v peak-to-peak. Changing the state of the /RESIN pin should change the clock amplitude by a selectable amount.

The ALE pin will be running, regardless of bus mode. Its frequency will give some idea of what the CPU is doing. If it is running with a high time of 50ns and a low time of 950ns, then the program is probably not being read correctly at all from the EPROM and the CPU is still running with its default 15 wait states. You may also see the CPU reset every 6.5ms (at 20MHz) with the RESETOUT going high and low as the on-chip watchdog trips out. This will also cause the /CS0 to go high briefly. If your program successfully got through the initialisation code, the ALE will be running with a low time of around 150ns. It will thus have executed the EINIT instruction and so the /RESOUT pin will have gone high.

167: If nothing is happening on the ALE and the /RESIN is high, then check that there are no spurious pull-down resistors on P0 as these are the emulation modes and the chip will be in ONCE mode. Also check that the lower P0 lines are showing signs of activity.

Next, put the `scope onto the /CS0 pin (P6.0) and check that it is high when the /RESIN pin is high and goes low when /RESIN is forced low. Make sure that the /CS0 makes it to the EPROM's /CE pin! Also check that the /RD pin is active after reset and that it is getting to the /OE on the EPROM.

If nothing unusual has been found, it is time to enlist the help of the CPU itself: if your board has provision for using bootstrap mode, then make the link or whatever the mechanism is and power -cycle the board to put the 166 into bootrap mode. If you have not provided for this, put an 8k2 pull down resistor on P0.4 (ALE for the 166) and cause a reset. If you have no RS232 driver on serial port0, you will have to add one, perhaps by putting a MAX232 on a piece of Veroboard and attaching the input lines to the S0TX and S0RX on the 166. On the connection to the PC COM port, pins 7 and 8 on the D-type connector will need to be connected together, as will 1, 4 and 6, so that the PC's UART will not hang up. Using the Hitex bootstrap utility, you should be able to get the CPU to report back the contents of the SYSCON (and BUSCON0 with the 167). From the returned value you should be able to deduce the bus mode, number of address and chip select lines, and whether the /WRH/WRL low mode is being used. All this information should be compared with the design specification for the board. If the bus mode or the WRH/WRL mode are wrong, this could be the problem. If you cannot get the CPU into bootstrap mode and the Port 0 bit 4 pull-down resistor is in place, it could be that the clock is unstable - simple crystal oscillators are prone to this, especially if you have not properly calculated the capacitor and load resistor values.

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13.2 Single Chip Designs

With no external bus there is very little that can go wrong, other than the /EA pin being in the wrong state for single-chip operation. You are advised to program the FLASH CPU before committing it to the board. If not, the bootstrap loader will have to be used to get the program in - ask for the Hitex bootstrap utilities to this.

13.3 Testing The System

If you have managed to get a simple port-pin toggling program going, you will have to now make sure that the /WR line(s) and chip select(s) are working by writing data into any external RAM devices or I/O devices.

If you have a DPROBE167, the View-User-SYSCON window will show you whether the /WRCFG pull-down resistor is present or not and will allow you to individually enable the chip selects, without using software, so that the RAM can be enabled, for example, or the registers in an off-chip peripheral examined. Testing these basic aspects of a new system is very time consuming and any errors missed at this stage can have major knock-on effects later in the project.

Even if you have not budgeted for a proper emulator for the project, we strongly recommend that you at least rent one for as long as it takes to prove that the basic hardware is working properly before the board is passed over to the software department!

To summarize, using an emulator to do the initial hardware debug is very easy as it allows you to effectively sit inside the CPU and look out through its pins. Errors such as stuck address lines, incorrect bus modes and open circuit I/O pins become obvious as their side-effects can be seen directly in the instruction and memory windows. More subtle problems such as inadequate grounding or poor clock circuit design may only come to light once the processor is used to run real software...the ICEconnect method is very good for this.

Testing The RAM And ROM On The Target System Via HiTOP167/WIN

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14. Conclusion

If you are about to embark on a 166 family design, we hope that you will have found some useful hints and tips in this guide. Should you be evaluating the family for a new project, you should now have realised that behind the vast amount of information in the data books there is a really great processor.

Good Luck!

15. Acknowledgements

The authors would like to thank the following people for their help in producing this guide:

John Barstow

Wendy Walker

Wilfried Bachstein

Ulrich Beier

Peter Mariutti

Plus all the hundreds of 166 family users in the United Kingdom...

16. Feedback

We hope you find this guide useful. As we are constantly revising it, we would welcome your suggestions for revisions or new topics. If you have any clever 166 tricks of your own, we would like to see them as well. Future editions will include such topics as EMC design, board layout, PC bus interfacing and others.

Please email your suggestions to INSIDE166@HITEX.CO.UK

Further Reading

If you enjoyed this 166 hardware epic, you may like the software sequel "An Introduction To The C Language On The 166 Family", available from Hitex Development Tools Ltd. for just $10.

There is also a complete "Teach Yourself 167 Programming" self-study course available, including a powerful training board, including a local CAN network. This unique kit allows engineers to familiarise themselves with the 167 CPU and its peripherals within their own workplaces. Please contact Hitex for more details.

17. Contact Addresses

Published By:

Hitex Development Tools Ltd., University Of Warwick Science Park, Sir William Lyons Road, Coventry, CV4 7EZ, United Kingdom.

To request any of the example software mentioned in this guide, please email INSIDE166@HITEX.CO.UK with your area of interest. If you have not seen what you want, it's probably worth contacting us anyway as we may well have produced something appropriate since this guide was published.

Additional copies may also be obtained from:

Hitex-Systementwicklung GmbH, Greschbachstrasse 12, D76229, Karlsruhe, Germany.

Tel. +49 (0)721 9628-193 FAX +49 (0)721 9628-262 Email:Team166@hitex.de

Hitex Development Tools (USA), 2055 Gateway Place, Suite 400, San Jose, California, USA.

Tel. +1 (408) 298-9077 FAX +1 (408) 441-9486 Email: info@hitex.com

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Appendix 1 -Infineon C166 Family Part Numbers

As with all electronic components care must be taken when ordering parts. In general ALL letters and digits of C166 part numbers are significant and MUST be specified. If in doubt ask someone who knows! As an illustration of the problems that a wrong part number can cause, consider the following real life story. An anguished user rang with a problem. He had done his development work based on comercially available SAB C167CR-LM processor boards. He had then carefully designed a PCB, a batch of which were sent for assembly. On testing the first production units he was somewhat surprised to find his C167 running at 2.5MHz CPU clock when he was expecting 20MHz. On investigation, it was discovered that the processor that had been fitted was an SAB C167-LM, which is a reduced specification device in comparison with the SAB C167CR-LM. Specifically the "CR" part has a Phase Locked Loop clock multiplier which (by default) multiplies the oscillator frequency by 4 to obtain the CPU clock. By comparison the "non-CR" part divides the oscillator frequency by 2 to generate the CPU Clock. In addition to the different clock generation the "non-CR" part had 2Kbytes less RAM than a "CR" and the "non-CR" part also had no CAN interface, which was essential for the application.

Over the years Infineon part numbers have undergone a number of changes. The most recent took place between production release of the first C166 family member (the 166) and subsequent members of the family. As a result there are 2 types of part number.

C166 devices are numbered as follows:-

Other family members are numbered as follows :-

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