iLLD_TC27xC  1.0
IfxPsi5_Psi5.h
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1 /**
2  * \file IfxPsi5_Psi5.h
3  * \brief PSI5 PSI5 details
4  * \ingroup IfxLld_Psi5
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Psi5_Psi5_Usage How to use the PSI5 PSI5 Interface driver?
25  * \ingroup IfxLld_Psi5
26  *
27  * PSI5 communicates with the external world via one input/output line for each channel.
28  *
29  * In the following sections it will be described, how to integrate the driver into the application framework.
30  *
31  * \section IfxLld_Psi5_Psi5_Preparation Preparation
32  * \subsection IfxLld_Psi5_Psi5_Include Include Files
33  *
34  * Include following header file into your C code:
35  * \code
36  * #include <Psi5/Psi5/IfxPsi5_Psi5.h>
37  * \endcode
38  *
39  * \subsection IfxLld_Psi5_Psi5_Variables Variables
40  * //used globally
41  * \code
42  * IfxPsi5_Psi5_Channel psi5Channel[IFXPSI5_PINMAP_NUM_CHANNELS];
43  * \endcode
44  *
45  * \subsection IfxLld_Psi5_Psi5_Module Module Initialisation
46  * \code
47  * // create module config
48  * IfxPsi5_Psi5_Config psi5Config;
49  * IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
50  *
51  * // initialize module
52  * IfxPsi5_Psi5 psi5;
53  * IfxPsi5_Psi5_initModule(&psi5, &psi5Config);
54  * \endcode
55  *
56  * \subsection IfxLld_Psi5_Psi5_Channel Channel Initialisation
57  * \code
58  * // create channel config
59  * IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
60  * IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
61  *
62  * psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
63  * psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
64  * psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
65  * psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
66  * psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
67  * psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
68  * psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
69  *
70  * for(int slot=0; slot<6; ++slot) {
71  * psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
72  * if( slot == 0 )
73  * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_Expected;
74  * else
75  * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_NotExpected;
76  * }
77  *
78  * // initialize channels
79  * for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
80  * psi5ChannelConfig.channelId = (IfxPsi5_ChannelId)chn;
81  *
82  * // TODO: currently no IOCRx.ALTI config field
83  * unsigned alti = 0;
84  *
85  * IfxPsi5_Psi5_PinsConfig pinsConfig;
86  * pinsConfig.in = IfxPsi5_Rx_In_pinTable[module][chn][alti];
87  * pinsConfig.inMode = IfxPort_InputMode_pullUp;
88  * pinsConfig.out = IfxPsi5_Tx_Out_pinTable[module][chn][alti];
89  * pinsConfig.outMode = IfxPort_OutputMode_pushPull;
90  * pinsConfig.pinDriver = IfxPort_PadDriver_cmosAutomotiveSpeed1;
91  *
92  * psi5ChannelConfig.pinsConfig = &pinsConfig;
93  *
94  * IfxPsi5_Psi5_initChannel(&psi5Channel[chn], &psi5ChannelConfig);
95  * }
96  * \endcode
97  *
98  * \subsection IfxLld_Psi5_Psi5_readChannelFrame read channel frame
99  * \code
100  * for(int i=0; i<5; ++i) {
101  * for(int chn=0; chn<IFXPSI5_PINMAP_NUM_CHANNELS; ++chn) {
102  * IfxPsi5_Psi5_Frame frame;
103  *
104  * while( !IfxPsi5_Psi5_readChannelFrame(&psi5Channel[chn], &frame) );
105  *
106  * clib_ver_printf("Chn%d: 0x%08x 0x%08x\n",
107  * (int)psi5Channel[chn].channelId,
108  * frame.rdm.lowWord, frame.rdm.highWord);
109  * }
110  * }
111  * \endcode
112  *
113  * \defgroup IfxLld_Psi5_Psi5 Psi5
114  * \ingroup IfxLld_Psi5
115  * \defgroup IfxLld_Psi5_Psi5_Structures Data Structures
116  * \ingroup IfxLld_Psi5_Psi5
117  * \defgroup IfxLld_Psi5_Psi5_Module Module Initialisation functions
118  * \ingroup IfxLld_Psi5_Psi5
119  * \defgroup IfxLld_Psi5_Psi5_Channel Channel functions
120  * \ingroup IfxLld_Psi5_Psi5
121  * \defgroup IfxLld_Psi5_Psi5_Clock Clock Intialisation functions
122  * \ingroup IfxLld_Psi5_Psi5
123  */
124 
125 #ifndef IFXPSI5_PSI5_H
126 #define IFXPSI5_PSI5_H 1
127 
128 /******************************************************************************/
129 /*----------------------------------Includes----------------------------------*/
130 /******************************************************************************/
131 
132 #include "Psi5/Std/IfxPsi5.h"
133 
134 /******************************************************************************/
135 /*-----------------------------Data Structures--------------------------------*/
136 /******************************************************************************/
137 
138 /** \addtogroup IfxLld_Psi5_Psi5_Structures
139  * \{ */
140 /** \brief PSI5 handle data structure
141  */
142 typedef struct
143 {
144  Ifx_PSI5 *psi5; /**< \brief Specifies the pointer to the PSI5 module registers */
145 } IfxPsi5_Psi5;
146 
147 /** \brief channel trigger configuration structure
148  */
149 typedef struct
150 {
151  uint32 channelTriggerValue; /**< \brief Specifies the channel trigger value CTV */
152  uint32 channelTriggerCounter; /**< \brief Specifies the channel trigger counter */
154 
155 /** \brief Clock configuration data structure
156  */
157 typedef struct
158 {
159  uint32 frequency; /**< \brief Specifies the frequency for the clock */
160  IfxPsi5_DividerMode mode; /**< \brief Specifies the mode of division for the clock */
161  IfxPsi5_ClockType type; /**< \brief Specifies the type of clock (fracDiv / slow 125kHz / fast 189 kHz / timestamp) */
163 
164 /** \brief Psi5 frame data structure with individual members
165  */
166 typedef struct
167 {
168  uint8 crcError : 1; /**< \brief Crc error flag */
169  uint8 crc : 3; /**< \brief Received crc */
170  uint32 readData : 28; /**< \brief Received data */
171  uint32 timestamp : 24; /**< \brief Timestamp */
172  uint8 slotCounter : 3; /**< \brief Slot counter */
173  uint8 timeslotError : 1; /**< \brief Time slot error flag */
174  uint8 numberOfBitsError : 1; /**< \brief Number of bits error flag */
175  uint8 messagingBitsError : 1; /**< \brief Messaging bits error flag */
176  uint8 noFrameReceivedError : 1; /**< \brief No frame received flag */
177  uint8 receiveMemoryOverflowError : 1; /**< \brief Receive buffer overflow error flag */
179 
180 /** \brief Input output configuration structure
181  */
182 typedef struct
183 {
184  boolean outputInverterEnabled; /**< \brief Specifies the pulse polarity of the output */
185  boolean inputInverterEnabled; /**< \brief Specifies the pulse polarity of the input */
186  IfxPsi5_DigitalInputFilterDepth digitalInputFilterDepth; /**< \brief Specifies the the number of port input samples considered for floating average */
188 
189 /** \brief Psi5 serial message with individual members
190  */
191 typedef struct
192 {
193  uint16 serialData : 16; /**< \brief Serial message data */
194  uint8 messageId : 8; /**< \brief Serial message Id */
195  uint8 crc : 6; /**< \brief Serial message crc */
196  uint8 serialMessageCRCFailedError : 1; /**< \brief Serial message crc error flag */
197  uint8 configuration : 1; /**< \brief Serial message configuration */
199 
200 /** \brief Sync pulse generation configuration structure
201  */
202 typedef struct
203 {
204  uint32 pulseLength; /**< \brief Specifies the standard pulse width without data coding for standard pulse width or for coding a '0' */
205  uint32 delayLength; /**< \brief Specifies the additional length of the pulse width for coding a '1' */
206  IfxPsi5_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTV as internal or external */
207  IfxPsi5_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock source for CTV in the case of external */
208  IfxPsi5_TriggerType periodicOrExternalOrBypass; /**< \brief Specifies whether periodic trigger or external trigger or bypass is selected */
209  IfxPsi5_Trigger externalTriggerSelect; /**< \brief Specifies the trigger source in case of external triggerring */
210  uint32 blankoutTime; /**< \brief Specifies the duration of blank out period */
212 
213 /** \brief Psi5 frame in double word format
214  */
215 typedef struct
216 {
217  uint32 lowWord; /**< \brief Lower 32 bits of the Psi5 frame */
218  uint32 highWord; /**< \brief Upper 32 bits of the Psi5 frame */
220 
221 /** \brief Psi5 serial message as unsigned 32 bit value
222  */
223 typedef struct
224 {
225  uint32 value; /**< \brief 32 bit value of the Psi5 serial message */
227 
228 /** \brief Receive control configuration structure
229  */
230 typedef struct
231 {
232  boolean asynchronousModeSelected; /**< \brief Specifies the asynchronous mode of operation */
233  uint32 fifoWarningLevel; /**< \brief Specifies the fifo warning level */
234  uint32 payloadLength[IFXPSI5_SLOT_COUNT]; /**< \brief Specifies the payload length for the slots 0 to 5 */
235  IfxPsi5_Verbose verboseForAsynchronousMode; /**< \brief Specifies the verbose mode selection in asynchronous mode of operation */
236  IfxPsi5_MessagingBits messagingBitsPresence[IFXPSI5_SLOT_COUNT]; /**< \brief Specifies the presence or absence of messaging bits in the slots 0 to 5 */
237  IfxPsi5_CRCorParity crcOrParity[IFXPSI5_SLOT_COUNT]; /**< \brief Specifies the crc or parity selection for the slots 0 to 5 */
238  IfxPsi5_FrameExpectation frameExpectation[IFXPSI5_SLOT_COUNT]; /**< \brief Specifies whether the frame is expected or not in the slots 0 to 5 */
239  IfxPsi5_Verbose verbose[IFXPSI5_SLOT_COUNT]; /**< \brief Specifies the verbose is enabled or disabled for the slots 0 to 5 */
240  IfxPsi5_BaudRate baudrateSelect; /**< \brief Specifies the baudrate selection */
241  IfxPsi5_TimestampRegister pulseTimestampSelect; /**< \brief Specifies the timestamp register selection for pulses */
242  IfxPsi5_TimestampRegister frameTimestampSelect; /**< \brief Specifies the timestamp register selection for start of frames */
243  IfxPsi5_ReceiveDataRegisterTimestamp receiveDataRegisterTimestamp; /**< \brief Specifies the pulse or start of frame based timestamp to be stored in receive data register RDRH */
245 
246 /** \brief Timestamp configuration data structure
247  */
248 typedef struct
249 {
250  IfxPsi5_Trigger externalTimeBaseSelect; /**< \brief Specifies the clock base for counter CTS in the case of external */
251  IfxPsi5_TimeBase timeBaseSelect; /**< \brief Specifies the clock source for CTS as internal or external */
253 
254 /** \brief Transmit control configuration structure
255  */
256 typedef struct
257 {
258  boolean enhancedProtocolSelected; /**< \brief Specifies whether the enhanced protocol is selected or not */
259  boolean bitStuffingEnabled; /**< \brief Specifies whether the bit stuffing is turned on or not */
260  boolean crcGenerationEnabled; /**< \brief Specifies whether the crc generation is turned on or not */
261  boolean startSequenceGenerationEnabled; /**< \brief Specifies whether the start sequence generation is turned on or not */
262  boolean inhibitingAutomaticTransferEnabled; /**< \brief Specifies whether automatic transfer from the shift registers SSRL/H to SORL/H is inhibited or not */
263  uint32 payloadLength; /**< \brief Specifies the payload length to be sent */
264  uint32 ssrPayloadLength; /**< \brief Specifies the payload length of SSR */
265  uint32 sorPayloadLength; /**< \brief Specifies the payload length of SOR */
267 
268 /** \} */
269 
270 /** \brief Pin Configuration structure
271  */
272 typedef struct
273 {
274  const IfxPsi5_Rx_In *in; /**< \brief The RX Pin which should be configured */
275  IfxPort_InputMode inMode; /**< \brief The pin input mode which should be configured */
276  const IfxPsi5_Tx_Out *out; /**< \brief The TX Pin which should be configured */
277  IfxPort_OutputMode outMode; /**< \brief The pin output mode which should be configured */
278  IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
280 
281 /** \addtogroup IfxLld_Psi5_Psi5_Structures
282  * \{ */
283 /** \brief Channel handle data structure
284  */
285 typedef struct
286 {
287  IfxPsi5_Psi5 *module; /**< \brief The PSI5 handle structure */
288  Ifx_PSI5_CH *channel; /**< \brief Pointer to the channel registers */
289  IfxPsi5_ChannelId channelId; /**< \brief Specifies the channel index */
291 
292 /** \brief Channel configuration structure
293  */
294 typedef struct
295 {
296  const IfxPsi5_Psi5 *module; /**< \brief Specifies pointer to the IfxPsi5_Psi5 module handle */
297  uint32 watchdogTimerLimit[IFXPSI5_WDT_COUNT]; /**< \brief Specifies the watchdog timer limit for each of the slots 0 to 6 */
298  IfxPsi5_ChannelId channelId; /**< \brief Specifies the channel index */
299  IfxPsi5_Psi5_PulseGeneration pulseGeneration; /**< \brief Specifies the configuration for sync pulse generation */
300  IfxPsi5_Psi5_ChannelTrigger channelTrigger; /**< \brief Specifies the configuration for channel trigger */
301  IfxPsi5_Psi5_ReceiveControl receiveControl; /**< \brief Specifies the configuration for reception */
302  IfxPsi5_Psi5_TransmitControl sendControl; /**< \brief Specifies the configuration for transmission */
303  IfxPsi5_Psi5_InputOutputControl inputOutputControl; /**< \brief Specifies the configuration for input output control */
304  const IfxPsi5_Psi5_PinsConfig *pinsConfig; /**< \brief Pin Configuration structure */
306 
307 /** \brief PSI5 module configuration structure
308  */
309 typedef struct
310 {
311  Ifx_PSI5 *psi5; /**< \brief Specifies the pointer to the PSI5 module registers */
312  IfxPsi5_Psi5_Clock fracDiv; /**< \brief Specifies fractionally divided clock properties */
313  IfxPsi5_Psi5_Clock slowClock; /**< \brief Specifies the slower f125 clock properties */
314  IfxPsi5_Psi5_Clock fastClock; /**< \brief Specifies the faster f189 clock properties */
315  IfxPsi5_Psi5_Clock timestampClock; /**< \brief Specifies the time stamp clock properties */
316  IfxPsi5_Psi5_TimeStampConfig timestampCounterA; /**< \brief Specifies the time stamp counter A properties */
317  IfxPsi5_Psi5_TimeStampConfig timestampCounterB; /**< \brief Specifies the time stamp counter B properties */
318  IfxPsi5_Psi5_TimeStampConfig timestampCounterC; /**< \brief Specifies the time stamp counter C properties */
320 
321 /** \brief Psi5 frame data union
322  */
323 typedef union
324 {
325  IfxPsi5_Psi5_Rdm rdm; /**< \brief Psi5 frame in double word format */
326  IfxPsi5_Psi5_FrameData frame; /**< \brief Psi5 frame data structure with individual members */
328 
329 /** \brief Psi5 serial message data structure
330  */
331 typedef union
332 {
333  IfxPsi5_Psi5_Rds rds; /**< \brief Psi5 serial message as unsigned 32 bit value */
334  IfxPsi5_Psi5_Message message; /**< \brief Psi5 serial message with individual members */
336 
337 /** \brief startup related options TBD
338  */
339 typedef struct
340 {
341  uint8 a : 1; /**< \brief TBD */
342  uint32 b : 31; /**< \brief TBD */
344 
345 /** \} */
346 
347 /** \addtogroup IfxLld_Psi5_Psi5_Module
348  * \{ */
349 
350 /******************************************************************************/
351 /*-------------------------Global Function Prototypes-------------------------*/
352 /******************************************************************************/
353 
354 /** \brief Resets the PSI5 module
355  * \param psi5 pointer to the PSI5 module
356  * \return None
357  */
359 
360 /** \brief Initialise the PSI5 with the supplied configureation
361  * \param psi5 pointer to the PSI5 module
362  * \param config pointer to the PSI5 configuration
363  * \return return TRUE on success & FALSE if configuration not valid
364  *
365  * A coding example can be found in \ref IfxPsi5_Psi5_readChannelFrame
366  *
367  */
369 
370 /** \brief Initialise buffer with default PSI5 configuration
371  * \param config pointer to the PSI5 module configuration
372  * \param psi5 base address of the PSI5 register space
373  * \return None
374  *
375  * A coding example can be found in \ref IfxPsi5_Psi5_readChannelFrame
376  *
377  */
378 IFX_EXTERN void IfxPsi5_Psi5_initModuleConfig(IfxPsi5_Psi5_Config *config, Ifx_PSI5 *psi5);
379 
380 /** \} */
381 
382 /** \addtogroup IfxLld_Psi5_Psi5_Channel
383  * \{ */
384 
385 /******************************************************************************/
386 /*-------------------------Inline Function Prototypes-------------------------*/
387 /******************************************************************************/
388 
389 /** \brief start the channel with the selected options
390  * \param channel pointer to the PSI5 channel
391  * \param options startup related options
392  * \return TRUE if successful; FALSE otherwise
393  *
394  * A coding example can be found in \ref IfxPsi5_Psi5_readChannelFrame
395  *
396  */
398 
399 /******************************************************************************/
400 /*-------------------------Global Function Prototypes-------------------------*/
401 /******************************************************************************/
402 
403 /** \brief Initialize the channel with the supplied configuration
404  * \param channel pointer to the PSI5 channel
405  * \param config pointer to the PSI5 channel configuration
406  * \return TRUE on success & FALSE if configuration not valid
407  *
408  * A coding example can be found in \ref IfxPsi5_Psi5_readChannelFrame
409  *
410  */
412 
413 /** \brief Get the current channel configuration (e.g. sample settings)
414  * \param config pointer to the PSI5 channel configuration
415  * \param psi5 pointer to the PSI5 module
416  * \return None
417  *
418  * A coding example can be found in \ref IfxPsi5_Psi5_readChannelFrame
419  *
420  */
422 
423 /** \brief Gets the received psi5 frame for the channel
424  * \param channel pointer to the PSI5 channel
425  * \param frame pointer to the PSI5 frame buffer
426  * \return TRUE if successful; FALSE if no frame available
427  *
428  * \code
429  * // create module config
430  * IfxPsi5_Psi5_Config psi5Config;
431  * IfxPsi5_Psi5_initModuleConfig(&psi5Config, &MODULE_PSI5);
432  *
433  * // initialize module
434  * IfxPsi5_Psi5 psi5;
435  * IfxPsi5_Psi5_initModule(&psi5, &psi5Config);
436  *
437  * // create channel config
438  * IfxPsi5_Psi5_ChannelConfig psi5ChannelConfig;
439  * IfxPsi5_Psi5_initChannelConfig(&psi5ChannelConfig, &psi5);
440  *
441  * psi5ChannelConfig.watchdogTimerLimit[0] = 0x32; // initial delay before slot 0 starts
442  * psi5ChannelConfig.watchdogTimerLimit[1] = 0x90;
443  * psi5ChannelConfig.watchdogTimerLimit[2] = 0x10;
444  * psi5ChannelConfig.watchdogTimerLimit[3] = 0x10;
445  * psi5ChannelConfig.watchdogTimerLimit[4] = 0x10;
446  * psi5ChannelConfig.watchdogTimerLimit[5] = 0x10;
447  * psi5ChannelConfig.watchdogTimerLimit[6] = 0x10;
448  * psi5ChannelConfig.sendControl.payloadLength = 15;
449  * psi5ChannelConfig.sendControl.enhancedProtocolSelected = TRUE;
450  * psi5ChannelConfig.sendControl.bitStuffingEnabled = TRUE;
451  * psi5ChannelConfig.sendControl.ssrPayloadLength = 0;
452  * psi5ChannelConfig.sendControl.sorPayloadLength = 0;
453  * psi5ChannelConfig.sendControl.crcGenerationEnabled = TRUE;
454  * psi5ChannelConfig.sendControl.startSequenceGenerationEnabled = TRUE;
455  * for(int slot=0; slot<6; ++slot) {
456  * psi5ChannelConfig.receiveControl.payloadLength[slot] = 8;
457  * if( slot == 0 )
458  * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_Expected;
459  * else
460  * psi5ChannelConfig.receiveControl.frameExpectation[slot] = IfxPsi5_FrameExpectation_NotExpected;
461  * }
462  *
463  * // initialize channels
464  * for(int chn=0; chn<IFXPSI5_NUM_CHANNELS; ++chn) {
465  * psi5ChannelConfig.channelId = (IfxPsi5_ChannelId)chn;
466  * IfxPsi5_Psi5_initChannel(&psi5Channel[chn], &psi5ChannelConfig);
467  * }
468  * uint32 data = 0x4321;
469  * if(IfxPsi5_Psi5_sendChannelData(&psi5Channel, data) == FALSE)
470  * {
471  * printf("\n TPOI is set; Transfer not possible\n");
472  * };
473  * // add the code below to initiate the sensor to transmit frames
474  * // ...
475  * // end of code to initiate the sensor to transmit frames
476  *
477  * // uncomment the below code after the adding the code to initiate the sensor to transmit frames
478  * // for(int i=0; i<5; ++i) {
479  * // IfxPsi5_Psi5_Frame frame;
480  * // for(int chn=0; chn<IFXPSI5_NUM_CHANNELS; ++chn) {
481  * // while( !IfxPsi5_Psi5_readChannelFrame(&psi5Channel[chn], &frame) );
482  * // }
483  * // printf("Chn%d: 0x%08x 0x%08x\n",(int)psi5Channel[chn].channelId, frame.rdm.lowWord, frame.rdm.highWord);
484  * // }
485  * \endcode
486  *
487  */
489 
490 /** \brief Get the received serial message for the channel
491  * \param channel pointer to the PSI5 channel
492  * \param slot Slot Id
493  * \param message pointer to the PSI5 serial message buffer
494  * \return TRUE if successful; FALSE if no serial message available
495  */
497 
498 /** \brief Transmit the data through the channel
499  * \param channel pointer to the PSI5 channel
500  * \param data data to be sent
501  * \return TRUE if successful; FALSE otherwise
502  *
503  * A coding example can be found in \ref IfxPsi5_Psi5_readChannelFrame
504  *
505  */
507 
508 /** \} */
509 
510 /******************************************************************************/
511 /*---------------------Inline Function Implementations------------------------*/
512 /******************************************************************************/
513 
515 {
516  return TRUE;
517 }
518 
519 
520 #endif /* IFXPSI5_PSI5_H */