52 #include "IfxSrc_reg.h"
53 #include "IfxScu_reg.h"
70 #define IFXCPU_GLB_ADDR_DSPR(cpu, address) ((((((unsigned)(address) & 0xF0000000) == 0xD0000000) ? ((((unsigned)(address) & 0x000fffff) | 0x70000000) - ((cpu) * 0x10000000)) : (unsigned)(address))))
83 #define IFXCPU_GLB_ADDR_PSPR(cpu, address) ((((unsigned)(address) & 0x000fffff) | 0x70100000) - ((cpu) * 0x10000000))
525 reg.U =
__mfcr(CPU_CORE_ID);
535 uint32 *nxtCsa = csaBegin;
537 for (k = 0; k < (((
uint32)csaEnd - (
uint32)csaBegin) / 64); k++)
539 nxt_cxi_val = ((
uint32)nxtCsa & (0XFU << 28)) >> 12 | ((
uint32)nxtCsa & (0XFFFFU << 6)) >> 6;
543 __mtcr(CPU_FCX, nxt_cxi_val);
547 *prvCsa = nxt_cxi_val;
550 prvCsa = (
uint32 *)nxtCsa;
555 __mtcr(CPU_LCX, nxt_cxi_val);
563 return reg.B.IE != 0;
585 if (enabled !=
FALSE)
601 dcon0.B.DCBYP = enable ? 0 : 1;
602 __mtcr(CPU_DCON0, dcon0.U);
617 __mtcr(CPU_PCON1, pcon1.U);
627 pcon0.B.PCBYP = enable ? 0 : 1;
628 __mtcr(CPU_PCON0, pcon0.U);
646 uint16 checkRestrictionMask;
652 checkRestrictionMask = ((
uint16)1 << (7 - coreId)) | ((
uint16)1 << 0xC);
654 if ((segmentNumberMask & checkRestrictionMask) != 0)
656 segmentNumberMask |= checkRestrictionMask;
659 cpu_pmaVal =
__mfcr(CPU_PMA0);
661 cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask);
668 __mtcr(CPU_PMA0, cpu_pmaVal);
677 uint16 checkRestrictionMask;
683 checkRestrictionMask = ((
uint16)1 << (7 - coreId)) | ((
uint16)1 << 0xD);
685 if ((segmentNumberMask & checkRestrictionMask) != 0)
687 segmentNumberMask |= checkRestrictionMask;
690 cpu_pmaVal =
__mfcr(CPU_PMA1);
692 cpu_pmaVal = enable ? (cpu_pmaVal | segmentNumberMask) : (cpu_pmaVal & ~segmentNumberMask);
699 __mtcr(CPU_PMA1, cpu_pmaVal);
711 pcon1.U =
__mfcr(CPU_PCON1);
713 __mtcr(CPU_PCON1, pcon1.U);
746 cctrl.U =
__mfcr(CPU_CCTRL);
748 __mtcr(CPU_CCTRL, cctrl.U);
767 cctrl.U =
__mfcr(CPU_CCTRL);
770 __mtcr(CPU_CCTRL, cctrl.U);
782 __mtcr(CPU_CCTRL, cctrl.U);
794 ccnt.U =
__mfcr(CPU_CCNT);
799 icnt.U =
__mfcr(CPU_ICNT);
804 m1cnt.U =
__mfcr(CPU_M1CNT);
809 m2cnt.U =
__mfcr(CPU_M2CNT);
814 m3cnt.U =
__mfcr(CPU_M3CNT);
825 return ccnt.B.CountValue;
844 cctrl.U =
__mfcr(CPU_CCTRL);
845 enableBit = cctrl.B.CE;
847 __mtcr(CPU_CCTRL, cctrl.U);
850 count &= ~(1U << 31);
854 cctrl.B.CE = enableBit;
855 __mtcr(CPU_CCTRL, cctrl.U);