iLLD_TC27xC  1.0
IfxSent.c
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1 /**
2  * \file IfxSent.c
3  * \brief SENT basic functionality
4  *
5  * \version iLLD_0_1_0_10
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  *
24  */
25 
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29 
30 #include "IfxSent.h"
31 
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35 
37 {
38  float32 fFracDiv = IfxSent_getModuleClock(sent);
39  float32 fPdiv = fFracDiv / (float32)(sent->CH[channelId].CPDR.B.PDIV + 1);
40 
41  uint32 div = sent->CH[channelId].CFDR.B.DIV;
42 
43  if (div > 0)
44  {
45  float32 fTick = (fPdiv * 56) / div;
46  return 1 / fTick;
47  }
48  else
49  {
50  return 0.0;
51  }
52 }
53 
54 
56 {
58 
59  uint32 rmc = sent->CLC.B.RMC;
60 
61  if (rmc < 1)
62  {
63  rmc = 1;
64  }
65 
66  float32 fclc = fsys / rmc;
67 
68  Ifx_SENT_FDR fdr;
69  fdr.U = sent->FDR.U;
70 
71  float32 kernelFreq = 0.0;
72 
73  if (fdr.B.DM == 1)
74  {
75  kernelFreq = fclc / (1024 - fdr.B.STEP);
76  }
77  else if (fdr.B.DM == 2)
78  {
79  kernelFreq = (fclc * fdr.B.STEP) / 1024;
80  }
81 
82  return kernelFreq;
83 }
84 
85 
86 void IfxSent_initializeChannelUnitTime(Ifx_SENT *sent, IfxSent_ChannelId channelId, float32 tUnit)
87 {
88  float32 fFracDiv = IfxSent_getModuleClock(sent);
89  const uint32 divMin = 560;
90  const uint32 divMax = 3276;
91 
92  uint32 pDiv;
93  uint32 fDiv;
94 
95  for (pDiv = 1; pDiv <= 1024; ++pDiv)
96  {
97  float32 fPdiv = fFracDiv / pDiv;
98  fDiv = fPdiv * 56 * tUnit;
99 
100  if ((fDiv >= divMin) && (fDiv <= divMax))
101  {
102  break;
103  }
104  }
105 
106  IfxSent_setChannelPreDivider(sent, channelId, pDiv - 1);
107  IfxSent_setChannelFractionalDivider(sent, channelId, fDiv);
108 }
109 
110 
111 void IfxSent_initializeModuleClock(Ifx_SENT *sent, IfxSent_ClockDividerMode dividerMode, uint16 stepValue)
112 {
113  Ifx_SENT_FDR tempFDR;
114  tempFDR.U = 0;
115  tempFDR.B.STEP = stepValue;
116  tempFDR.B.DM = dividerMode;
117  sent->FDR.U = tempFDR.U;
118 }
119 
120 
121 void IfxSent_resetModule(Ifx_SENT *sent)
122 {
123  sent->KRST1.B.RST = 1; /* Only if both Kernel reset bits are set a reset is executed */
124  sent->KRST0.B.RST = 1;
125 
126  while (sent->KRST0.B.RSTSTAT == 0)
127  {
128  /* Wait until reset is executed */
129  }
130 
131  sent->KRSTCLR.B.CLR = 1; /* Clear Kernel reset status bit */
132 }