iLLD_TC27xC  1.0
IfxQspi_SpiMaster.h
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1 /**
2  * \file IfxQspi_SpiMaster.h
3  * \brief QSPI SPIMASTER details
4  * \ingroup IfxLld_Qspi
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Qspi_SpiMaster_Usage How to use the SPI Master Interface driver?
25  * \ingroup IfxLld_Qspi
26  *
27  * The SPI Master interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
28  *
29  * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
30  * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
31  *
32  * In the following sections it will be described, how to integrate the driver into the application framework.
33  *
34  * \section IfxLld_Qspi_SpiMaster_Preparation Preparation
35  * \subsection IfxLld_Qspi_SpiMaster_Include Include Files
36  *
37  * Include following header file into your C code:
38  * \code
39  * #include <Qspi/SpiMaster/IfxQspi_SpiMaster.h>
40  * \endcode
41  *
42  * \subsection IfxLld_Qspi_SpiMaster_Variables Variables
43  *
44  * Declare QSPI module and channel handles:
45  *
46  * \code
47  * IfxQspi_SpiMaster spi;
48  * IfxQspi_SpiMaster_Channel spiChannel;
49  * \endcode
50  *
51  * In addition, declare global transmit and receive buffers for the data transfers:
52  * \code
53  * #define SPI_BUFFER_SIZE 8
54  * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
55  * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
56  * \endcode
57  *
58  * \subsection IfxLld_Qspi_SpiMaster_Interrupt Interrupt Handler Installation (without dma use)
59  *
60  * See also \ref IfxLld_Cpu_Interrupt_Usage
61  *
62  * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
63  * \code
64  * // priorities are normally defined in Ifx_IntPrioDef.h
65  * #define IFX_INTPRIO_QSPI0_TX 1
66  * #define IFX_INTPRIO_QSPI0_RX 2
67  * #define IFX_INTPRIO_QSPI0_ER 5
68  * \endcode
69  *
70  * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
71  * \code
72  * IFX_INTERRUPT(qspi0TxISR, 0, IFX_INTPRIO_QSPI0_TX)
73  * {
74  * IfxQspi_SpiMaster_isrTransmit(&spiMaster);
75  * }
76  *
77  * IFX_INTERRUPT(qspi0RxISR, 0, IFX_INTPRIO_QSPI0_RX)
78  * {
79  * IfxQspi_SpiMaster_isrReceive(&spiMaster);
80  * }
81  *
82  * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
83  * {
84  * IfxQspi_SpiMaster_isrError(&spiMaster);
85  * }
86  * \endcode
87  *
88  * Finally install the interrupt handlers in your initialisation function:
89  * \code
90  * // install interrupt handlers
91  * IfxCpu_Irq_installInterruptHandler(&qspi0TxISR, IFX_INTPRIO_QSPI0_TX);
92  * IfxCpu_Irq_installInterruptHandler(&qspi0RxISR, IFX_INTPRIO_QSPI0_RX);
93  * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
94  * IfxCpu_enableInterrupts();
95  * \endcode
96  *
97  * \subsection IfxLld_Qspi_SpiMaster_Interrupt_dma Interrupt Handler Installation (with dma use)
98  *
99  * See also \ref IfxLld_Cpu_Interrupt_Usage
100  *
101  * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
102  * \code
103  * // qspi priorities
104  * #define IFX_INTPRIO_QSPI0_TX 1 // DMA channel 1
105  * #define IFX_INTPRIO_QSPI0_RX 2 // DMA channel 2
106  * #define IFX_INTPRIO_QSPI0_ER 0x30
107  *
108  * // dma priorities
109  * #define IFX_INTPRIO_DMA_CH1 10
110  * #define IFX_INTPRIO_DMA_CH2 11
111  * \endcode
112  *
113  * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
114  * \code
115  * IFX_INTERRUPT(qspi0DmaTxISR, 0, IFX_INTPRIO_DMA_CH1 )
116  * {
117  * IfxQspi_SpiMaster_isrDmaTransmit(&spiMaster);
118  * }
119  *
120  * IFX_INTERRUPT(qspi0DmaRxISR, 0, IFX_INTPRIO_DMA_CH2)
121  * {
122  * IfxQspi_SpiMaster_isrDmaReceive(&spiMaster);
123  * }
124  *
125  * IFX_INTERRUPT(qspi0ErISR, 0, IFX_INTPRIO_QSPI0_ER)
126  * {
127  * IfxQspi_SpiMaster_isrError(&spiMaster);
128  * }
129  * \endcode
130  *
131  * Finally install the interrupt handlers in your initialisation function:
132  * \code
133  * // install interrupt handlers
134  * IfxCpu_Irq_installInterruptHandler(&qspi0DmaTxISR, IFX_INTPRIO_DMA_CH1);
135  * IfxCpu_Irq_installInterruptHandler(&qspi0DmaRxISR, IFX_INTPRIO_DMA_CH2);
136  * IfxCpu_Irq_installInterruptHandler(&qspi0ErISR, IFX_INTPRIO_QSPI0_ER);
137  * IfxCpu_enableInterrupts();
138  * \endcode
139  *
140  *
141  * \subsection IfxLld_Qspi_SpiMaster_Init Module Initialisation (without dma use)
142  *
143  * The module initialisation can be done in the same function.
144  *
145  * Here an example for master mode:
146  * \code
147  * // create module config
148  * IfxQspi_SpiMaster_Config spiMasterConfig;
149  * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
150  *
151  * // set the desired mode and maximum baudrate
152  * spiMasterConfig.base.mode = SpiIf_Mode_master;
153  * spiMasterConfig.base.maximumBaudrate = 10000000;
154  *
155  * // ISR priorities and interrupt target
156  * spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
157  * spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
158  * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
159  * spiMasterConfig.base.isrProvider = (IfxSrc_Tos)IfxCpu_getCoreId();
160  *
161  * // pin configuration
162  * const IfxQspi_SpiMaster_Pins pins = {
163  * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
164  * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
165  * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
166  * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
167  * };
168  * spiMasterConfig.pins = &pins;
169  *
170  * // initialize module
171  * //IfxQspi_SpiMaster spi; // defined globally
172  * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
173  * \endcode
174  *
175  * \subsection IfxLld_Qspi_SpiMaster_Init_dma Module Initialisation (with dma use)
176  *
177  * The module initialisation can be done in the same function.
178  *
179  * Here an example for master mode:
180  * \code
181  * // create module config
182  * IfxQspi_SpiMaster_Config spiMasterConfig;
183  * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
184  *
185  * // set the desired mode and maximum baudrate
186  * spiMasterConfig.base.mode = SpiIf_Mode_master;
187  * spiMasterConfig.base.maximumBaudrate = 10000000;
188  *
189  * // ISR priorities and interrupt target (with Dma usage)
190  * spiMasterConfig.base.txPriority = IFX_INTPRIO_DMA_CH1;
191  * spiMasterConfig.base.rxPriority = IFX_INTPRIO_DMA_CH2;
192  * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
193  *
194  * // dma configuration.
195  * spiMasterConfig.dma.txDmaChannelId = IfxDma_ChannelId_1;
196  * spiMasterConfig.dma.rxDmaChannelId = IfxDma_ChannelId_2;
197  * spiMasterConfig.dma.useDma = 1;
198  *
199  * // pin configuration
200  * const IfxQspi_SpiMaster_Pins pins = {
201  * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
202  * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
203  * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
204  * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
205  * };
206  * spiMasterConfig.pins = &Pins;
207  *
208  *
209  * // initialize module
210  * //IfxQspi_SpiMaster spi; // defined globally
211  * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
212  * \endcode
213  *
214  *
215  * \subsection IfxLld_Qspi_SpiMaster_ChannelInit SPI Channel Initialisation
216  *
217  * After the module has been initialized, one or more SPI channels can be configured.
218  * Each channel has a dedicated select line.
219  *
220  * Here an example for a SPI channel in master mode:
221  * \code
222  * // create channel config
223  * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
224  * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
225  *
226  * // set the baudrate for this channel
227  * spiMasterChannelConfig.base.baudrate = 5000000;
228  *
229  * // select pin configuration
230  * const IfxQspi_SpiMaster_Output slsOutput = {
231  * &IfxQspi0_SLSO7_P33_5_OUT,
232  * IfxPort_OutputMode_pushPull,
233  * IfxPort_PadDriver_cmosAutomotiveSpeed1
234  * };
235  * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
236  *
237  * // initialize channel
238  * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
239  * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
240  * \endcode
241  *
242  * The QSPI is ready for use now!
243  *
244  *
245  * \section IfxLld_Qspi_SpiMaster_DataTransfers Data Transfers
246  *
247  * In following examples we assume, that following buffers are declared globally:
248  * \code
249  * // declared somewhere globally
250  * #define SPI_BUFFER_SIZE 8
251  * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
252  * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
253  * \endcode
254  *
255  * Sending and Receiving a data stream:
256  * \code
257  * // wait until transfer of previous data stream is finished
258  * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
259  *
260  * // send/receive new stream
261  * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
262  * \endcode
263  *
264  * Send only, discard received data:
265  * \code
266  * // wait until transfer of previous data stream is finished
267  * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
268  *
269  * // send new stream
270  * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
271  * \endcode
272  *
273  * Receive only, send all-1
274  * \code
275  * // wait until transfer of previous data stream is finished
276  * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
277  *
278  * // receive new stream
279  * IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
280  * \endcode
281  *
282  * \defgroup IfxLld_Qspi_SpiMaster SPI Master Driver
283  * \ingroup IfxLld_Qspi
284  * \defgroup IfxLld_Qspi_SpiMaster_DataStructures Data Structures
285  * \ingroup IfxLld_Qspi_SpiMaster
286  * \defgroup IfxLld_Qspi_SpiMaster_Module Module Functions
287  * \ingroup IfxLld_Qspi_SpiMaster
288  * \defgroup IfxLld_Qspi_SpiMaster_Channel Channel Functions
289  * \ingroup IfxLld_Qspi_SpiMaster
290  * \defgroup IfxLld_Qspi_SpiMaster_Support Support Functions
291  * \ingroup IfxLld_Qspi_SpiMaster
292  * \defgroup IfxLld_Qspi_SpiMaster_Com Communication
293  * \ingroup IfxLld_Qspi_SpiMaster
294  * \defgroup IfxLld_Qspi_SpiMaster_InterruptFunctions Interrupt Functions
295  * \ingroup IfxLld_Qspi_SpiMaster
296  * \defgroup IfxLld_Qspi_SpiMaster_DirectFifo Direct FIFO Access
297  * \ingroup IfxLld_Qspi_SpiMaster
298  */
299 
300 #ifndef IFXQSPI_SPIMASTER_H
301 #define IFXQSPI_SPIMASTER_H 1
302 
303 /******************************************************************************/
304 /*----------------------------------Includes----------------------------------*/
305 /******************************************************************************/
306 
307 #include "Qspi/Std/IfxQspi.h"
308 #include "If/SpiIf.h"
309 #include "Dma/Dma/IfxDma_Dma.h"
310 
311 /******************************************************************************/
312 /*------------------------------Type Definitions------------------------------*/
313 /******************************************************************************/
314 
316 
318 
319 /******************************************************************************/
320 /*-----------------------------Data Structures--------------------------------*/
321 /******************************************************************************/
322 
323 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
324  * \{ */
325 /** \brief Dma handle
326  */
327 typedef struct
328 {
329  IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
330  IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
331  IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
332  IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
333  boolean useDma; /**< \brief use Dma for Data transfer/s */
335 
336 /** \brief SLSI pin configuration structure
337  */
338 typedef struct
339 {
340  const IfxQspi_Slsi_In *pin; /**< \brief Pointer to SLSI in pin */
341  IfxPort_InputMode mode; /**< \brief The SLSI pin input mode */
343 
344 /** \brief SLSO pin configuration structure
345  */
346 typedef struct
347 {
348  const IfxQspi_Slso_Out *pin; /**< \brief Pointer to SLSO out pin */
349  IfxPort_OutputMode mode; /**< \brief The SLSO pin output mode */
350  IfxPort_PadDriver driver; /**< \brief The pad driver mode which should be configured */
352 
353 /** \} */
354 
355 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
356  * \{ */
357 /** \brief Module handle data structure
358  */
359 typedef struct
360 {
361  SpiIf base; /**< \brief Module SPI interface handle */
362  Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
363  IfxQspi_SpiMaster_Dma dma; /**< \brief dma handle */
365 
366 /** \brief Dma configuration
367  */
368 typedef struct
369 {
370  IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
371  IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
372  boolean useDma; /**< \brief use Dma for Data transfer/s */
374 
375 /** \brief Union of Slave Select pins
376  */
377 typedef union
378 {
379  IfxQspi_SpiMaster_Input input; /**< \brief SLSI pin configuration structure */
380  IfxQspi_SpiMaster_Output output; /**< \brief SLSO pin configuration structure */
382 
383 /** \brief Master pin IO configuration structure
384  */
385 typedef struct
386 {
387  const IfxQspi_Sclk_Out *sclk; /**< \brief Pointer to SLCK out pin */
388  IfxPort_OutputMode sclkMode; /**< \brief The SCLK pin output mode */
389  const IfxQspi_Mtsr_Out *mtsr; /**< \brief Pointer to MTSR out pin */
390  IfxPort_OutputMode mtsrMode; /**< \brief The MTSR pin output mode */
391  const IfxQspi_Mrst_In *mrst; /**< \brief Pointer to MRST in pin */
392  IfxPort_InputMode mrstMode; /**< \brief The MRST pin input mode */
393  IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
395 
396 /** \} */
397 
398 /** \addtogroup IfxLld_Qspi_SpiMaster_DataStructures
399  * \{ */
400 /** \brief Module Channel configuration structure
401  */
402 typedef struct
403 {
404  SpiIf_ChConfig base; /**< \brief SPI interface channel configuration structure */
405  IfxQspi_SpiMaster_InputOutput sls; /**< \brief Union of Slave Select pins */
407 
408 /** \brief Module Channel handle structure
409  */
411 {
412  SpiIf_Ch base; /**< \brief SPI interface channel handle structure */
413  IfxQspi_SpiMaster *module; /**< \brief Module handle data structure */
414  Ifx_QSPI_BACON bacon; /**< \brief basic configuration register */
415  IfxPort_Pin slso; /**< \brief Defines SLSO pin */
416  IfxQspi_SpiMaster_AutoSlso activateSlso; /**< \brief Specifies function for Auto SLSO activation */
417  IfxQspi_SpiMaster_AutoSlso deactivateSlso; /**< \brief Specifies function for Auto SLSO deactivation */
418  IfxQspi_ChannelId channelId; /**< \brief QSPI channel Number */
419  Ifx_ActiveState slsoActiveState; /**< \brief Specifies the current state of SLSO */
420  uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
421  boolean firstWrite; /**< \brief Spepcifies whether the data id first write or not. */
422 };
423 
424 /** \brief Module configuration structure
425  */
426 typedef struct
427 {
428  SpiIf_Config base; /**< \brief SPI interface configuration structure */
429  Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
430  boolean allowSleepMode; /**< \brief Specifies module sleep mode */
431  boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
432  IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
433  IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
434  IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
435  const IfxQspi_SpiMaster_Pins *pins; /**< \brief structure for QSPI Master pins */
436  IfxQspi_SpiMaster_DmaConfig dma; /**< \brief Dma configuration */
438 
439 /** \} */
440 
441 /** \addtogroup IfxLld_Qspi_SpiMaster_Module
442  * \{ */
443 
444 /******************************************************************************/
445 /*-------------------------Global Function Prototypes-------------------------*/
446 /******************************************************************************/
447 
448 /** \brief Initialises the module
449  * \param handle Module handle
450  * \param config Predefined configuration structure of the module
451  * \return None
452  *
453  * Configuration example for QSPI in master mode:
454  * \code
455  * // create module config
456  * IfxQspi_SpiMaster_Config spiMasterConfig;
457  * IfxQspi_SpiMaster_initModuleConfig(&spiMasterConfig, &MODULE_QSPI0);
458  *
459  * // set the desired mode and maximum baudrate
460  * spiMasterConfig.base.mode = SpiIf_Mode_master;
461  * spiMasterConfig.base.maximumBaudrate = 10000000;
462  *
463  * // ISR priorities and interrupt target
464  * spiMasterConfig.base.txPriority = IFX_INTPRIO_QSPI0_TX;
465  * spiMasterConfig.base.rxPriority = IFX_INTPRIO_QSPI0_RX;
466  * spiMasterConfig.base.erPriority = IFX_INTPRIO_QSPI0_ER;
467  * spiMasterConfig.base.isrProvider = (IfxSrc_Tos)IfxCpu_getCoreId();
468  *
469  * // pin configuration
470  * const IfxQspi_SpiMaster_Pins pins = {
471  * &IfxQspi0_SCLK_P20_11_OUT, IfxPort_OutputMode_pushPull, // SCLK
472  * &IfxQspi0_MTSR_P20_14_OUT, IfxPort_OutputMode_pushPull, // MTSR
473  * &IfxQspi0_MRSTA_P20_12_IN, IfxPort_InputMode_pullDown, // MRST
474  * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
475  * };
476  * spiMasterConfig.pins = &pins;
477  *
478  * // initialize module
479  * //IfxQspi_SpiMaster spi; // defined globally
480  * IfxQspi_SpiMaster_initModule(&spi, &spiMasterConfig);
481  * \endcode
482  *
483  */
485 
486 /** \brief Fills the config structure with default values
487  * \param config Configuration structure which should be initialized.
488  * \param qspi pointer to QSPI registers
489  * \return None
490  *
491  * Usage example: see \ref IfxQspi_SpiMaster_initModule
492  *
493  */
495 
496 /** \} */
497 
498 /** \addtogroup IfxLld_Qspi_SpiMaster_Channel
499  * \{ */
500 
501 /******************************************************************************/
502 /*-------------------------Global Function Prototypes-------------------------*/
503 /******************************************************************************/
504 
505 /** \brief Initializes the channel
506  * \param chHandle Module Channel handle
507  * \param chConfig Channel configuration structure
508  * \return Status of Channel (busy or ok or failure)
509  *
510  * Configuration example for a QSPI channel in master mode:
511  * \code
512  * // create channel config
513  * IfxQspi_SpiMaster_ChannelConfig spiMasterChannelConfig;
514  * IfxQspi_SpiMaster_initChannelConfig(&spiMasterChannelConfig, &spi);
515  *
516  * // set the baudrate for this channel
517  * spiMasterChannelConfig.base.baudrate = 5000000;
518  *
519  * // select pin configuration
520  * const IfxQspi_SpiMaster_Output slsOutput = {
521  * &IfxQspi0_SLSO7_P33_5_OUT,
522  * IfxPort_OutputMode_pushPull,
523  * IfxPort_PadDriver_cmosAutomotiveSpeed1
524  * };
525  * spiMasterChannelConfig.sls.output = (IfxQspi_SpiMaster_Output)slsOutput;
526  *
527  * // initialize channel
528  * //IfxQspi_SpiMaster_Channel spiChannel; // defined globally
529  * IfxQspi_SpiMaster_initChannel(&spiChannel, &spiMasterChannelConfig);
530  * \endcode
531  *
532  */
534 
535 /** \brief Fills the config structure with default values
536  * \param chConfig Configuration structure which should be initialized.
537  * \param handle Module handle
538  * \return None
539  *
540  * Usage example: see \ref IfxQspi_SpiMaster_initChannel
541  *
542  */
544 
545 /** \} */
546 
547 /** \addtogroup IfxLld_Qspi_SpiMaster_Com
548  * \{ */
549 
550 /******************************************************************************/
551 /*-------------------------Global Function Prototypes-------------------------*/
552 /******************************************************************************/
553 
554 /** \brief Exchanges data between source and data
555  * \param chHandle Module Channel handle
556  * \param src Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
557  * \param dest Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
558  * \param count Number of data in pending
559  * \return Status of exchange of data
560  *
561  * In following examples we assume, that following buffers are declared globally:
562  * \code
563  * // declared somewhere globally
564  * uint8 spiTxBuffer[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
565  * uint8 spiRxBuffer[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
566  * \endcode
567  *
568  * Sending and Receiving a data stream:
569  * \code
570  * // wait until transfer of previous data stream is finished
571  * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
572  *
573  * // send/receive new stream
574  * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], &spiRxBuffer[i], 8);
575  * \endcode
576  *
577  * Send only, discard received data:
578  * \code
579  * // wait until transfer of previous data stream is finished
580  * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
581  *
582  * // send new stream
583  * IfxQspi_SpiMaster_exchange(&spiChannel, &spiTxBuffer[i], NULL_PTR, 8);
584  * \endcode
585  *
586  * Receive only, send all-1
587  * \code
588  * // wait until transfer of previous data stream is finished
589  * while( IfxQspi_SpiMaster_getStatus(&spiChannel) == SpiIf_Status_busy );
590  *
591  * // receive new stream
592  * IfxQspi_SpiMaster_exchange(&spiChannel, NULL_PTR, &spiRxBuffer[i], 8);
593  * \endcode
594  *
595  * The handling of slave transfers is identical.
596  *
597  */
598 IFX_EXTERN SpiIf_Status IfxQspi_SpiMaster_exchange(IfxQspi_SpiMaster_Channel *chHandle, const void *src, void *dest, Ifx_SizeT count);
599 
600 /** \brief Gets the transmission status
601  * \param chHandle Module Channel handle
602  * \return Transmission status
603  *
604  * Usage example: see \ref IfxQspi_SpiMaster_exchange
605  *
606  */
608 
609 /** \} */
610 
611 /** \addtogroup IfxLld_Qspi_SpiMaster_InterruptFunctions
612  * \{ */
613 
614 /******************************************************************************/
615 /*-------------------------Global Function Prototypes-------------------------*/
616 /******************************************************************************/
617 
618 /** \brief Transmit interrupt handler
619  * \param qspiHandle Module handle
620  * \return None
621  */
623 
624 /** \brief Transmit interrupt handler
625  * \param qspiHandle Module handle
626  * \return None
627  */
629 
630 /** \brief Error Interrupt handler
631  * \param handle Module handle
632  * \return None
633  */
635 
636 /** \brief Receive Interrupt handler
637  * \param handle Module handle
638  * \return None
639  */
641 
642 /** \brief Transmit interrupt handler
643  * \param handle Module handle
644  * \return None
645  */
647 
648 /** \} */
649 
650 /** \addtogroup IfxLld_Qspi_SpiMaster_DirectFifo
651  * \{ */
652 
653 /******************************************************************************/
654 /*-------------------------Inline Function Prototypes-------------------------*/
655 /******************************************************************************/
656 
657 /** \brief Reads data or status in RxFIFO
658  * \param handle Module handle
659  * \return Data or Status in RxFIFO
660  */
662 
663 /** \brief Writes Basic configuration value to Tx FIFO
664  * \param handle Module handle
665  * \param baconVal Basic configuration value to be entered in TxFIFO
666  * \return None
667  */
669 
670 /** \brief Writes extended configuration of the channel
671  * \param chHandle Module Channel handle
672  * \param econVal Channel Timing configuration value
673  * \return None
674  */
676 
677 /** \brief Writes data and configuration mixed value to Tx FIFO
678  * \param handle Module handle
679  * \param mixEntryVal Mixed of Data and configuration
680  * \return None
681  */
683 
684 /** \brief Writes the data to TxFIFO
685  * \param chHandle Module Channel handle
686  * \param data Data to be entered in Tx FIFO
687  * \return None
688  */
690 
691 /** \} */
692 
693 /******************************************************************************/
694 /*---------------------Inline Function Implementations------------------------*/
695 /******************************************************************************/
696 
698 {
699  Ifx_QSPI *qspiSFR = handle->qspi;
700  uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
701  return data;
702 }
703 
704 
706 {
707  Ifx_QSPI *qspiSFR = handle->qspi;
708  IfxQspi_writeBasicConfiguration(qspiSFR, baconVal);
709 }
710 
711 
713 {
714  IfxQspi_writeExtendedConfiguration(chHandle->module->qspi, chHandle->channelId, econVal);
715 }
716 
717 
719 {
720  Ifx_QSPI *qspiSFR = handle->qspi;
721  IfxQspi_writeMixedDataTransmitFifo(qspiSFR, mixEntryVal);
722 }
723 
724 
726 {
727  IfxQspi_writeTransmitFifo(chHandle->module->qspi, chHandle->channelId, data);
728 }
729 
730 
731 #endif /* IFXQSPI_SPIMASTER_H */