iLLD_TC27xC  1.0
IfxDsadc.h
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1 /**
2  * \file IfxDsadc.h
3  * \brief DSADC basic functionality
4  * \ingroup IfxLld_Dsadc
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Dsadc DSADC
25  * \ingroup IfxLld
26  * \defgroup IfxLld_Dsadc_Std Standard Driver
27  * \ingroup IfxLld_Dsadc
28  * \defgroup IfxLld_Dsadc_Std_Enum Enumerations
29  * \ingroup IfxLld_Dsadc_Std
30  * \defgroup IfxLld_Dsadc_Std_Operative Operative Functions
31  * \ingroup IfxLld_Dsadc_Std
32  * \defgroup IfxLld_Dsadc_Std_Support Support Functions
33  * \ingroup IfxLld_Dsadc_Std
34  * \defgroup IfxLld_Dsadc_Std_Interrupt Interrupt Functions
35  * \ingroup IfxLld_Dsadc_Std
36  * \defgroup IfxLld_Dsadc_Std_IO IO Pin Configuration Functions
37  * \ingroup IfxLld_Dsadc_Std
38  */
39 
40 #ifndef IFXDSADC_H
41 #define IFXDSADC_H 1
42 
43 /******************************************************************************/
44 /*----------------------------------Includes----------------------------------*/
45 /******************************************************************************/
46 
47 #include "_Impl/IfxDsadc_cfg.h"
48 #include "Src/Std/IfxSrc.h"
50 
51 /******************************************************************************/
52 /*--------------------------------Enumerations--------------------------------*/
53 /******************************************************************************/
54 
55 /** \addtogroup IfxLld_Dsadc_Std_Enum
56  * \{ */
57 /** \brief Comb Filter (auxiliary) shift control\n
58  * Definition in Ifx_DSADC.FCFGA.B.AFSC
59  */
60 typedef enum
61 {
62  IfxDsadc_AuxCombFilterShift_noShift = 0, /**< \brief no shift, use full range */
63  IfxDsadc_AuxCombFilterShift_shiftBy1 = 1, /**< \brief Shift by 1 */
64  IfxDsadc_AuxCombFilterShift_shiftBy2 = 2, /**< \brief Shift by 2 */
65  IfxDsadc_AuxCombFilterShift_shiftBy3 = 3 /**< \brief Shift by 3 */
67 
68 /** \brief Comb Filter (auxiliary) configuration/type\n
69  * Definition in Ifx_DSADC.FCFGA.B.CFAC
70  */
71 typedef enum
72 {
73  IfxDsadc_AuxCombFilterType_comb1 = 0, /**< \brief CIC1 */
74  IfxDsadc_AuxCombFilterType_comb2 = 1, /**< \brief CIC2 */
75  IfxDsadc_AuxCombFilterType_comb3 = 2, /**< \brief CIC3 */
76  IfxDsadc_AuxCombFilterType_combF = 3 /**< \brief CICF */
78 
79 /** \brief Service request generation (auxiliary)\n
80  * Definition in Ifx_DSADC.FCFGA.B.ESEL
81  */
82 typedef enum
83 {
84  IfxDsadc_AuxEvent_everyNewResult = 0, /**< \brief Always, for each new result value */
85  IfxDsadc_AuxEvent_insideBoundary = 1, /**< \brief If result is inside the boundary band */
86  IfxDsadc_AuxEvent_outsideBoundary = 2 /**< \brief If result is outside the boundary band */
88 
89 /** \brief Service request generation (auxiliary)\n
90  * Definition in Ifx_DSADC.FCFGA.B.EGT
91  */
92 typedef enum
93 {
94  IfxDsadc_AuxGate_definedByESEL = 0, /**< \brief Separate: generate events according to ESEL */
95  IfxDsadc_AuxGate_coupledToIntegrator = 1 /**< \brief Coupled: generate events only when the integrator is enabled and after the discard phase defined by bitfield NVALDIS */
97 
98 /** \brief Service request generation (auxiliary)\n
99  * Definition in Ifx_DSADC.FCFGA.B.SRGA
100  */
101 typedef enum
102 {
103  IfxDsadc_AuxServiceRequest_never = 0, /**< \brief Never, service requests disabled */
104  IfxDsadc_AuxServiceRequest_auxFilter = 1, /**< \brief Auxiliary filter: As selected by bitfield ESEL (\ref IfxDsadc_AuxEvent) */
105  IfxDsadc_AuxServiceRequest_altSource = 2 /**< \brief Alternate source: Capturing of a sign delay value to register CGSYNCx (x = 0 - 5) */
107 
108 /** \brief Carrier generation mode\n
109  * Definition in Ifx_DSADC.CGCFG.B.CGMOD
110  */
111 typedef enum
112 {
113  IfxDsadc_CarrierWaveformMode_stopped = 0, /**< \brief Carrier Generator stopped */
114  IfxDsadc_CarrierWaveformMode_square = 1, /**< \brief Carrier Generator generates square wave */
115  IfxDsadc_CarrierWaveformMode_triangle = 2, /**< \brief Carrier Generator generates triangle wave */
116  IfxDsadc_CarrierWaveformMode_sine = 3 /**< \brief Carrier Generator generates sine wave */
118 
119 /** \brief Specifies the channel Index
120  */
121 typedef enum
122 {
123  IfxDsadc_ChannelId_0 = 0, /**< \brief Specifies the channel Index 0 */
124  IfxDsadc_ChannelId_1 = 1, /**< \brief Specifies the channel Index 1 */
125  IfxDsadc_ChannelId_2 = 2, /**< \brief Specifies the channel Index 2 */
126  IfxDsadc_ChannelId_3 = 3, /**< \brief Specifies the channel Index 3 */
127  IfxDsadc_ChannelId_4 = 4, /**< \brief Specifies the channel Index 4 */
128  IfxDsadc_ChannelId_5 = 5, /**< \brief Specifies the channel Index 5 */
130 
131 /** \brief Modulator common mode voltage selection\n
132  * Definition in Ifx_DSADC.MODCFGx.B.CMVS
133  */
134 typedef enum
135 {
136  IfxDsadc_CommonModeVoltage_a = 0, /**< \brief VCM = VAREF / 3.03 (1.65 V for VAREF = 5.0 V), recommended for VDDM = 3.3 V1.65V */
137  IfxDsadc_CommonModeVoltage_b = 1, /**< \brief VCM = VAREF / 2.27 (2.2 V for VAREF = 5.0 V), recommended for low distortion of AC-coupled signals */
138  IfxDsadc_CommonModeVoltage_c = 2 /**< \brief VCM = VAREF / 2.0 (2.5 V for VAREF = 5.0 V), recommended for DC-coupled signals */
140 
141 /** \brief FIR data shift control\n
142  * Selects the displacement caused by the data shifter at the FIR filter output\n
143  * Definition in Ifx_DSADC.FCFGM.B.DSH
144  */
145 typedef enum
146 {
147  IfxDsadc_FirDataShift_noShift = 0, /**< \brief no shift, use full range */
148  IfxDsadc_FirDataShift_shiftBy1 = 1, /**< \brief Shift by 1 */
149  IfxDsadc_FirDataShift_shiftBy2 = 2, /**< \brief Shift by 2 */
150  IfxDsadc_FirDataShift_shiftBy3 = 3 /**< \brief Shift by 3 */
152 
153 /** \brief FIR shift control\n
154  * Selects the displacement caused by the data shifter inbetween the FIR filter blocks.\n
155  * Definition in Ifx_DSADC.FCFGM.B.FSH
156  */
157 typedef enum
158 {
159  IfxDsadc_FirInternalShift_noShift = 0, /**< \brief no shift, use full range */
160  IfxDsadc_FirInternalShift_shiftBy1 = 1 /**< \brief Shift by 1 */
162 
163 /** \brief Modulator configuration of positive/negative input line\n
164  * Definition in Ifx_DSADC.MODCFGx.B.INCFGP and Ifx_DSADC.MODCFGx.B.INCFGN
165  */
166 typedef enum
167 {
168  IfxDsadc_InputConfig_inputPin = 0, /**< \brief Modulator input connected to external pin */
169  IfxDsadc_InputConfig_supplyVoltage = 1, /**< \brief Modulator input connected to supply voltage V_ddm */
170  IfxDsadc_InputConfig_commonModeVoltage = 2, /**< \brief Modulator input connected to common mode voltage V_cm */
171  IfxDsadc_InputConfig_referenceGround = 3 /**< \brief Modulator input connected to reference ground V_ref */
173 
174 /** \brief Demodulator input data source selection\n
175  * Definition in Ifx_DSADC.DICFG.B.DSRC
176  */
177 typedef enum
178 {
179  IfxDsadc_InputDataSource_onChipStandAlone = 0, /**< \brief On-chip modulator, standalone (3rd order) */
180  IfxDsadc_InputDataSource_onChipCombined = 1, /**< \brief On-chip modulator, yield (2nd order) */
181  IfxDsadc_InputDataSource_directInputA = 2, /**< \brief External, from input A, direct */
182  IfxDsadc_InputDataSource_invertedInputA = 3, /**< \brief External, from input A, inverted */
183  IfxDsadc_InputDataSource_directInputB = 4, /**< \brief External, from input B, direct */
184  IfxDsadc_InputDataSource_invertedInputB = 5 /**< \brief External, from input B, inverted */
186 
187 /** \brief Modulator gain select of analog input path\n
188  * Definition in Ifx_DSADC.MODCFGx.B.GAINSEL
189  */
190 typedef enum
191 {
192  IfxDsadc_InputGain_factor1 = 0, /**< \brief Input gain factor: 1 */
193  IfxDsadc_InputGain_factor2 = 1, /**< \brief Input gain factor: 2 */
194  IfxDsadc_InputGain_factor4 = 2, /**< \brief Input gain factor: 4 */
195  IfxDsadc_InputGain_factor8 = 3, /**< \brief Input gain factor: 8 */
196  IfxDsadc_InputGain_factor16 = 4 /**< \brief Input gain factor: 16 */
198 
199 /** \brief Modulator input pin selection\n
200  * Definition in Ifx_DSADC.MODCFGx.B.INMUX
201  */
202 typedef enum
203 {
204  IfxDsadc_InputPin_a = 0, /**< \brief Pin A connected to modulator input */
205  IfxDsadc_InputPin_b = 1, /**< \brief Pin B connected to modulator input */
206  IfxDsadc_InputPin_c = 2, /**< \brief Pin C connected to modulator input */
207  IfxDsadc_InputPin_d = 3 /**< \brief Pin D connected to modulator input */
209 
210 /** \brief Integrator window size\n
211  * Definition in Ifx_DSADC.IWCTR.B.IWS
212  */
213 typedef enum
214 {
215  IfxDsadc_IntegrationWindowSize_internalControl = 0, /**< \brief Internal control: stop integrator after REPVAL+1 integration cycles */
216  IfxDsadc_IntegrationWindowSize_externalControl = 1 /**< \brief External control: stop integrator when bit INTEN becomes 0 */
218 
219 /** \brief Integrator trigger mode\n
220  * NOTE: switch-first to bypassed before using other mode\n
221  * Definition in Ifx_DSADC.DICFG.B.ITRMODE
222  */
223 typedef enum
224 {
225  IfxDsadc_IntegratorTrigger_bypassed = 0, /**< \brief No integration trigger, integrator bypassed */
226  IfxDsadc_IntegratorTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
227  IfxDsadc_IntegratorTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
228  IfxDsadc_IntegratorTrigger_alwaysActive = 3 /**< \brief No trigger, integrator active all the time */
230 
231 /** \brief Low power supply voltage select\n
232  * Definition in Ifx_DSADC.GLOBCFG.B.LOSUP
233  */
234 typedef enum
235 {
236  IfxDsadc_LowPowerSupply_5V = 0, /**< \brief Supply Voltage for Analog Circuitry set to 5V */
237  IfxDsadc_LowPowerSupply_3_3V = 1 /**< \brief Supply Voltage for Analog Circuitry set to 3.3V */
239 
240 /** \brief Comb Filter (Main Chain) shift control\n
241  * Definition in Ifx_DSADC.FCFGC.B.MFSC
242  */
243 typedef enum
244 {
245  IfxDsadc_MainCombFilterShift_noShift = 0, /**< \brief no shift, use full range */
246  IfxDsadc_MainCombFilterShift_shiftBy1 = 1, /**< \brief Shift by 1 */
247  IfxDsadc_MainCombFilterShift_shiftBy2 = 2, /**< \brief Shift by 2 */
248  IfxDsadc_MainCombFilterShift_shiftBy3 = 3 /**< \brief Shift by 3 */
250 
251 /** \brief Comb Filter (Main Chain) configuration/type\n
252  * Definition in Ifx_DSADC.FCFGC.B.CFMC
253  */
254 typedef enum
255 {
256  IfxDsadc_MainCombFilterType_comb1 = 0, /**< \brief CIC1 */
257  IfxDsadc_MainCombFilterType_comb2 = 1, /**< \brief CIC2 */
258  IfxDsadc_MainCombFilterType_comb3 = 2, /**< \brief CIC3 */
259  IfxDsadc_MainCombFilterType_combF = 3 /**< \brief CICF */
261 
262 /** \brief Service request generation (main chain)\n
263  * Definition in Ifx_DSADC.FCFGC.B.SRGM
264  */
265 typedef enum
266 {
267  IfxDsadc_MainServiceRequest_never = 0, /**< \brief Never, service requests disabled */
268  IfxDsadc_MainServiceRequest_highGateSignal = 1, /**< \brief While gate (selected trigger signal) is high */
269  IfxDsadc_MainServiceRequest_lowGateSignal = 2, /**< \brief While gate (selected trigger signal) is low */
270  IfxDsadc_MainServiceRequest_everyNewResult = 3 /**< \brief Always, for each new result value */
272 
273 /** \brief Modulator clock select\n
274  * Definition in Ifx_DSADC.GLOBCFG.B.MCSEL
275  */
276 typedef enum
277 {
278  IfxDsadc_ModulatorClock_off = 0, /**< \brief Internal clock off, no source selected */
279  IfxDsadc_ModulatorClock_fDSD = 1, /**< \brief f_dsd clock selected */
280  IfxDsadc_ModulatorClock_fERAY = 2, /**< \brief f_eray clock selected */
281  IfxDsadc_ModulatorClock_fOSC0 = 3 /**< \brief f_osc0 clock selected */
283 
284 /** \brief Modulator divider factor for modulator clock\n
285  * Definition in Ifx_DSADC.MODCFGx.B.DIVM
286  */
287 typedef enum
288 {
289  IfxDsadc_ModulatorClockDivider_div2 = 0, /**< \brief f_mod = f_clk / 2 */
290  IfxDsadc_ModulatorClockDivider_div4, /**< \brief f_mod = f_clk / 4 */
291  IfxDsadc_ModulatorClockDivider_div6, /**< \brief f_mod = f_clk / 6 */
292  IfxDsadc_ModulatorClockDivider_div8, /**< \brief f_mod = f_clk / 8 */
293  IfxDsadc_ModulatorClockDivider_div10, /**< \brief f_mod = f_clk / 10 */
294  IfxDsadc_ModulatorClockDivider_div12, /**< \brief f_mod = f_clk / 12 */
295  IfxDsadc_ModulatorClockDivider_div14, /**< \brief f_mod = f_clk / 14 */
296  IfxDsadc_ModulatorClockDivider_div16, /**< \brief f_mod = f_clk / 16 */
297  IfxDsadc_ModulatorClockDivider_div18, /**< \brief f_mod = f_clk / 18 */
298  IfxDsadc_ModulatorClockDivider_div20, /**< \brief f_mod = f_clk / 20 */
299  IfxDsadc_ModulatorClockDivider_div22, /**< \brief f_mod = f_clk / 22 */
300  IfxDsadc_ModulatorClockDivider_div24, /**< \brief f_mod = f_clk / 24 */
301  IfxDsadc_ModulatorClockDivider_div26, /**< \brief f_mod = f_clk / 26 */
302  IfxDsadc_ModulatorClockDivider_div28, /**< \brief f_mod = f_clk / 28 */
303  IfxDsadc_ModulatorClockDivider_div30, /**< \brief f_mod = f_clk / 30 */
304  IfxDsadc_ModulatorClockDivider_div32, /**< \brief f_mod = f_clk / 32 */
306 
307 /** \brief Rectifier sign source\n
308  * Selects the sign signal that is to be delayed.\n
309  * Definition in Ifx_DSADC.RECT.B.SSRC
310  */
311 typedef enum
312 {
313  IfxDsadc_RectifierSignSource_onChipGenerator = 0, /**< \brief On-chip carrier generator */
314  IfxDsadc_RectifierSignSource_nextChannel = 1, /**< \brief Sign of result of next channel */
315  IfxDsadc_RectifierSignSource_externalA = 2, /**< \brief External sign signal A */
316  IfxDsadc_RectifierSignSource_externalB = 3 /**< \brief External sign signal B */
318 
319 /** \brief Demodulator sample clock source select\n
320  * Definition in Ifx_DSADC.DICFG.B.CSRC
321  */
322 typedef enum
323 {
324  IfxDsadc_SampleClockSource_internal = 0, /**< \brief Internal clock */
325  IfxDsadc_SampleClockSource_inputA = 1, /**< \brief External clock, from Input A */
326  IfxDsadc_SampleClockSource_inputB = 2, /**< \brief External clock, from Input B */
327  IfxDsadc_SampleClockSource_inputC = 3 /**< \brief External clock, from Input C */
329 
330 /** \brief Demodulator data strobe generation mode\n
331  * Definition in Ifx_DSADC.DICFG.B.STROBE
332  */
333 typedef enum
334 {
335  IfxDsadc_SampleStrobe_noDataStrobe = 0, /**< \brief No data strobe */
336  IfxDsadc_SampleStrobe_sampleOnRisingEdge = 1, /**< \brief Direct clock, a sample trigger is generated at each rising clock edge */
337  IfxDsadc_SampleStrobe_sampleOnFallingEdge = 2, /**< \brief Direct clock, a sample trigger is generated at each falling clock edge */
338  IfxDsadc_SampleStrobe_sampleOnBothEdges = 3, /**< \brief Double data, a sample trigger is generated at each rising and falling clock edge */
339  IfxDsadc_SampleStrobe_reserved = 4, /**< \brief don't use */
340  IfxDsadc_SampleStrobe_sampleOnTwoRisingEdges = 5, /**< \brief Double clock, a sample trigger is generated at every 2nd rising clock edge */
341  IfxDsadc_SampleStrobe_sampleOnTwoFallingEdges = 6 /**< \brief Double clock, a sample trigger is generated at every 2nd falling clock edge */
343 
344 /** \brief Timestamp trigger mode\n
345  * Definition in Ifx_DSADC.DICFG.B.TSTRMODE
346  */
347 typedef enum
348 {
349  IfxDsadc_TimestampTrigger_noTrigger = 0, /**< \brief No timestamp trigger */
350  IfxDsadc_TimestampTrigger_fallingEdge = 1, /**< \brief Trigger event upon a falling edge */
351  IfxDsadc_TimestampTrigger_risingEdge = 2, /**< \brief Trigger event upon a rising edge */
352  IfxDsadc_TimestampTrigger_eachEdge = 3 /**< \brief Trigger event upon each edge */
354 
355 /** \brief Trigger select\n
356  * Definition in Ifx_DSADC.DICFG.B.TRSEL
357  */
358 typedef enum
359 {
360  IfxDsadc_TriggerInput_a = 0, /**< \brief dsadc trig 0 */
361  IfxDsadc_TriggerInput_b = 1, /**< \brief dsadc trig 1 */
362  IfxDsadc_TriggerInput_c = 2, /**< \brief vadc trig 0 */
363  IfxDsadc_TriggerInput_d = 3, /**< \brief vadc trig 1 */
364  IfxDsadc_TriggerInput_e = 4, /**< \brief external pin e */
365  IfxDsadc_TriggerInput_f = 5, /**< \brief external pin f */
369 
370 /** \} */
371 
372 /** \addtogroup IfxLld_Dsadc_Std_Operative
373  * \{ */
374 
375 /******************************************************************************/
376 /*-------------------------Inline Function Prototypes-------------------------*/
377 /******************************************************************************/
378 
379 /** \brief Enables the conversion of multiple channels
380  * \param dsadc Pointer to the DSADC register space
381  * \param modulatorMask the modulator which should be running (bitwise selection)
382  * \param channelMask the channels which should be scanned (bitwise selection)
383  * \return None
384  *
385  * \code
386  * // enable the conversion of all 6 DSADC channels
387  * IfxDsadc_startScan(&MODULE_DSADC, 0x3FU, 0x3FU);
388  * // results are now available in IFXDSADC(ds).CH[x].RESM.B.RESULT (x=0..5)
389  * \endcode
390  *
391  */
392 IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask);
393 
394 /** \brief Disables the conversion of multiple channels
395  * \param dsadc Pointer to the DSADC register space
396  * \param modulatorMask the modulator which should be disabled (bitwise selection)
397  * \return None
398  *
399  * \code
400  * // disable the modulators of all 6 DSADC channels
401  * IfxDsadc_stopScan(&MODULE_DSADC, 0x3FU);
402  * \endcode
403  *
404  */
405 IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask);
406 
407 /** \} */
408 
409 /** \addtogroup IfxLld_Dsadc_Std_Support
410  * \{ */
411 
412 /******************************************************************************/
413 /*-------------------------Inline Function Prototypes-------------------------*/
414 /******************************************************************************/
415 
416 /** \brief Get result from the auxiliary chain
417  * \param dsadc Pointer to the DSADC register space
418  * \param channel Channel Id
419  * \return result from the auxiliary chain
420  */
421 IFX_INLINE sint16 IfxDsadc_getAuxResult(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
422 
423 /** \brief Get the main comb decimation factor
424  * \param dsadc Pointer to the DSADC register space
425  * \param channel Channel Id
426  * \return the main comb decimation factor
427  */
429 
430 /** \brief Get result from the main chain
431  * \param dsadc Pointer to the DSADC register space
432  * \param channel Channel Id
433  * \return result from the main chain
434  */
436 
437 /** \brief Return TRUE if DSADC module is enabled
438  * \param dsadc Pointer to the DSADC register space
439  * \return TRUE if DSADC module is enabled
440  */
441 IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc);
442 
443 /** \brief Set the carrier waveform mode
444  * \param dsadc Pointer to the DSADC register space
445  * \param waveformMode the waveform mode
446  * \return None
447  */
448 IFX_INLINE void IfxDsadc_setCarrierMode(Ifx_DSADC *dsadc, IfxDsadc_CarrierWaveformMode waveformMode);
449 
450 /******************************************************************************/
451 /*-------------------------Global Function Prototypes-------------------------*/
452 /******************************************************************************/
453 
454 /** \brief Get the sample frequency of the integrator output in Hz
455  * \param dsadc Pointer to the DSADC register space
456  * \param channel Channel Id
457  * \return frequency in Hz
458  */
460 
461 /** \brief Get the sample frequency of the main COMB filter output in Hz
462  * \param dsadc Pointer to the DSADC register space
463  * \param channel Channel Id
464  * \return frequency in Hz
465  */
467 
468 /** \brief Estimate the group delay of main-chain filters in seconds
469  * \param dsadc Pointer to the DSADC register space
470  * \param channel Channel Id
471  * \return delay in seconds
472  */
474 
475 /** \brief Get the modulator clock frequency in Hz
476  * \param dsadc Pointer to the DSADC register space
477  * \param channel Channel Id
478  * \return frequency in Hz
479  */
481 
482 /** \brief Get the input frequency of DSADC in Hz
483  * \param dsadc Pointer to the DSADC register space
484  * \return frequency in Hz
485  */
487 
488 /** \} */
489 
490 /** \addtogroup IfxLld_Dsadc_Std_Interrupt
491  * \{ */
492 
493 /******************************************************************************/
494 /*-------------------------Global Function Prototypes-------------------------*/
495 /******************************************************************************/
496 
497 /** \brief Address/pointer to the interrupt source register
498  * \param dsadc Pointer to the DSADC register space
499  * \param channel Channel Id
500  * \return Address/pointer to the interrupt source register
501  */
502 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxDsadc_getAuxSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
503 
504 /** \brief Get the interrupt source register for a Main event
505  * \param dsadc Pointer to the DSADC register space
506  * \param channel Channel Id
507  * \return Address/pointer to the interrupt source register
508  */
509 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxDsadc_getMainSrc(Ifx_DSADC *dsadc, IfxDsadc_ChannelId channel);
510 
511 /** \} */
512 
513 /** \addtogroup IfxLld_Dsadc_Std_IO
514  * \{ */
515 
516 /******************************************************************************/
517 /*-------------------------Inline Function Prototypes-------------------------*/
518 /******************************************************************************/
519 
520 /** \brief Initializes a CGPWM output
521  * \param cgPwm the CGPWM Pin which should be configured
522  * \param pinMode the pin output mode which should be configured
523  * \param padDriver the pad driver mode which should be configured
524  * \return None
525  */
527 
528 /** \brief Initializes a CIN input
529  * \param cIn the CIN Pin which should be configured
530  * \param cInMode the pin input mode which should be configured
531  * \return None
532  */
534 
535 /** \brief Initializes a COUT output
536  * \param cout the COUT Pin which should be configured
537  * \param pinMode the pin output mode which should be configured
538  * \param padDriver the pad driver mode which should be configured
539  * \return None
540  */
542 
543 /** \brief Initializes a DIN input
544  * \param dIn the DIN Pin which should be configured
545  * \param dInMode the pin input mode which should be configured
546  * \return None
547  */
549 
550 /** \brief Initializes a DS input
551  * \param dsn the DSN Pin which should be configured
552  * \param pinMode the pin input mode which should be configured
553  * \return None
554  */
556 
557 /** \brief Initializes a DS input
558  * \param dsp the DSP Pin which should be configured
559  * \param pinMode the pin input mode which should be configured
560  * \return None
561  */
563 
564 /** \brief Initializes a ITR input
565  * \param itr the ITR Pin which should be configured
566  * \param itrMode the pin input mode which should be configured
567  * \return None
568  */
570 
571 /** \brief Initializes a SG input
572  * \param sg the SG Pin which should be configured
573  * \param pinMode the pin input mode which should be configured
574  * \return None
575  */
577 
578 /** \} */
579 
580 /******************************************************************************/
581 /*---------------------Inline Function Implementations------------------------*/
582 /******************************************************************************/
583 
584 IFX_INLINE void IfxDsadc_startScan(Ifx_DSADC *dsadc, uint32 modulatorMask, uint32 channelMask)
585 {
586  dsadc->GLOBRC.U = dsadc->GLOBRC.U | ((modulatorMask << 16) | (channelMask));
587 }
588 
589 
590 IFX_INLINE void IfxDsadc_stopScan(Ifx_DSADC *dsadc, uint32 modulatorMask)
591 {
592  dsadc->GLOBRC.U &= ~(modulatorMask << 16);
593 }
594 
595 
597 {
598  return (sint16)(dsadc->CH[channel].RESA.B.RESULT);
599 }
600 
601 
603 {
604  return (uint16)(1U + dsadc->CH[channel].FCFGC.B.CFMDF);
605 }
606 
607 
609 {
610  return (sint16)(dsadc->CH[channel].RESM.B.RESULT);
611 }
612 
613 
614 IFX_INLINE boolean IfxDsadc_isModuleEnabled(Ifx_DSADC *dsadc)
615 {
616  return dsadc->CLC.B.DISS == 0;
617 }
618 
619 
621 {
622  dsadc->CGCFG.B.CGMOD = waveformMode;
623 }
624 
625 
627 {
628  IfxPort_setPinModeOutput(cgPwm->pin.port, cgPwm->pin.pinIndex, pinMode, cgPwm->select);
629  IfxPort_setPinPadDriver(cgPwm->pin.port, cgPwm->pin.pinIndex, padDriver);
630 }
631 
632 
634 {
635  IfxPort_setPinModeInput(cIn->pin.port, cIn->pin.pinIndex, cInMode);
636 }
637 
638 
640 {
641  IfxPort_setPinModeOutput(cout->pin.port, cout->pin.pinIndex, pinMode, cout->select);
642  IfxPort_setPinPadDriver(cout->pin.port, cout->pin.pinIndex, padDriver);
643 }
644 
645 
647 {
648  IfxPort_setPinModeInput(dIn->pin.port, dIn->pin.pinIndex, dInMode);
649 }
650 
651 
653 {
654  if (dsn->pin.port != NULL_PTR)
655  {
656  IfxPort_setPinModeInput(dsn->pin.port, dsn->pin.pinIndex, pinMode);
657  }
658 }
659 
660 
662 {
663  if (dsp->pin.port != NULL_PTR)
664  {
665  IfxPort_setPinModeInput(dsp->pin.port, dsp->pin.pinIndex, pinMode);
666  }
667 }
668 
669 
671 {
672  IfxPort_setPinModeInput(itr->pin.port, itr->pin.pinIndex, itrMode);
673 }
674 
675 
677 {
678  IfxPort_setPinModeInput(sg->pin.port, sg->pin.pinIndex, pinMode);
679 }
680 
681 
682 #endif /* IFXDSADC_H */