iLLD_TC27xC  1.0
SpiIf.h
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1 /**
2  * \file SpiIf.h
3  * \brief SPI interface types
4  *
5  * \version iLLD_0_1_0_10
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  * \defgroup library_srvsw_if_spi SPI interface
24  * \ingroup library_srvsw_if
25  *
26  */
27 
28 #ifndef SPIIF_H
29 #define SPIIF_H 1
30 
31 //________________________________________________________________________________________
32 // INCLUDES
33 
34 #include "Src/Std/IfxSrc.h" /* FIXME interface should not have dependencies to the HAL, an If type needs to be defined */
35 
36 /** \addtogroup library_srvsw_if_spi
37  * \{ */
38 
39 //________________________________________________________________________________________
40 // CONFIGURATION SWITCHES
41 
42 //________________________________________________________________________________________
43 // HELPER MACROS
44 
45 //________________________________________________________________________________________
46 // BASIC TYPES
47 
48 /** \brief SPI Interface Status */
49 typedef enum
50 {
54 } SpiIf_Status;
55 
56 /** \brief Slave select output timing */
57 typedef enum
58 {
59  SpiIf_SlsoTiming_0 = 0, /**< zero delay clock */
60  SpiIf_SlsoTiming_1, /**< 1 half-clock delay */
61  SpiIf_SlsoTiming_2, /**< 2 half-clock delay */
62  SpiIf_SlsoTiming_3, /**< 3 half-clock delay */
63  SpiIf_SlsoTiming_4, /**< 4 half-clock delay */
64  SpiIf_SlsoTiming_5, /**< 5 half-clock delay */
65  SpiIf_SlsoTiming_6, /**< 6 half-clock delay */
66  SpiIf_SlsoTiming_7 /**< 7 half-clock delay */
68 
69 /** \brief Heading */
70 typedef enum
71 {
72  SpiIf_DataHeading_lsbFirst = 0, /**< LSB first */
73  SpiIf_DataHeading_msbFirst /**< MSB first */
75 
76 /** \brief Clock phase */
77 typedef enum
78 {
79  SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge = 0, /**< Shift Tx data on leading edge */
80  SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge /**< Shift Tx data on training edge */
82 
83 /** \brief Clock polarity */
84 typedef enum
85 {
86  SpiIf_ClockPolarity_idleLow = 0, /**< Idle clock line is low */
87  SpiIf_ClockPolarity_idleHigh /**< Idle clock line is high */
89 
90 //________________________________________________________________________________________
91 // DATA STRUCTURES
92 
93 /** \brief Alias to the channel structure */
94 typedef struct SpiIf_Ch_ SpiIf_Ch;
96 typedef struct SpiIf_ SpiIf;
97 
98 typedef volatile struct
99 {
100  uint32 onTransfer : 1; /**< \brief Channel status: On transfer */
101  uint32 byteAccess : 1; /**< \brief Channel status: 8bit / 16 bit access */
102 } SpiIf_Flags;
103 
104 typedef struct
105 {
106  void *data;
108 } SpiIf_Job;
109 
110 /** SPI operation modes */
111 typedef enum
112 { /* FIXME check conflicts with IfxQspi_Mode */
113  SpiIf_Mode_master, /**< \brief Master mode */
114  SpiIf_Mode_slave, /**< \brief Slave mode */
115  SpiIf_Mode_undefined /**< \brief Undefined mode */
116 } SpiIf_Mode;
117 
118 typedef SpiIf_Status (*SpiIf_Exchange)(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
120 typedef void (*SpiIf_OnEvent)(SpiIf *handle);
121 
122 typedef struct
123 {
129 } SpiIf_funcs;
130 
131 struct SpiIf_
132 {
133  pvoid driver; /**< \brief Spi specific driver */
134  uint32 sending; /**< \brief */
135  SpiIf_Ch *activeChannel; /**< \brief Channel actually transmitting / receiving */
139 };
140 
141 typedef struct
142 {
143  SpiIf_Mode mode; /**< \brief Specifies the interface operation mode */
144  Ifx_Priority rxPriority; /**< \brief Specifies the priority of the receive interrupt */
145  Ifx_Priority txPriority; /**< \brief Specifies the priority of the transmit interrupt */
146  Ifx_Priority erPriority; /**< \brief Specifies the priority of the error interrupt */
147  IfxSrc_Tos isrProvider; /**< \brief Specifies the handler of the interrupts */
148  Ifx_SizeT bufferSize; /**< \brief Specifies the number of channels that can be buffered. If 0, buffering is disabled */
149  void *buffer; /**< \brief Specifies the buffer location.The buffer parameter must point on a free memory location where the
150  * buffer object will be initialised. The Size of this area must be at least
151  * equals to "Size + sizeof(Ifx_Fifo) + 8",
152  * with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking
153  * this in account may result in unpredictable behaviour. */
154  float32 maximumBaudrate; /**< \brief Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock */
155 } SpiIf_Config;
156 
157 typedef struct
158 {
159  uint32 baudrate : 1; /**< \brief TRUE = checked, FALSE = ignored */
160  uint32 phase : 1; /**< \brief TRUE = checked, FALSE = ignored */
161  uint32 receive : 1; /**< \brief TRUE = checked, FALSE = ignored */
162  uint32 transmit : 1; /**< \brief TRUE = checked, FALSE = ignored */
163  uint32 reserved : 28;
165 
166 /** Channel operation mode */
167 typedef struct
168 {
169  uint32 enabled : 1; /**< \brief 1 = channel enabled, 0 = channel disabled */
170  uint32 autoCS : 1; /**< \brief 1 = chip select is controlled by the hardware module or, 0 = by software. */
171  uint32 loopback : 1; /**< \brief 0 = normal mode, 1 = loopback mode */
172  uint32 clockPolarity : 1; /**< \brief \ref SpiIf_ClockPolarity*/
173  uint32 shiftClock : 1; /**< \brief \ref SpiIf_ShiftClock */
174  uint32 dataHeading : 1; /**< \brief \ref SpiIf_DataHeading */
175  uint32 dataWidth : 6; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
176 
177  uint32 csActiveLevel : 1; /**< \brief \ref Ifx_ActiveState */
178  uint32 csLeadDelay : 3; /**< \brief \ref SpiIf_SlsoTiming */
179  uint32 csTrailDelay : 3; /**< \brief \ref SpiIf_SlsoTiming */
180  uint32 csInactiveDelay : 3; /**< \brief \ref SpiIf_SlsoTiming */
181  uint32 parityCheck : 1; /**< \brief 0 = disabled, 1 = enabled */
182  uint32 parityMode : 1; /**< \brief \ref Ifx_ParityMode */
183 } SpiIf_ChMode;
184 
185 /** \brief SPI channel callback prototype */
186 typedef void (*SpiIf_Cbk)(void *data);
187 typedef void (*TxRxHandler)(SpiIf_Ch *handle);
188 
189 struct SpiIf_Ch_
190 {
191  SpiIf *driver; /**< \brief Pointer to the SPI interface driver */
193  Spi_ErrorChecks errorChecks; /**< \brief Error checks */
194  sint32 baudrate; /**< \brief Real baudrate */
197  SpiIf_Cbk onExchangeEnd; /**< \brief Specifies the callback function on end of exchange */
198  void *callbackData; /**< \brief Specifies pointer to the user specific data on transmit end */
201 };
202 
204 {
205  SpiIf *driver; /**< \brief Pointer to an implementation of SPI interface driver, e.g. \ref IfxQspi_Spi */
206  float32 baudrate; /**< \brief Specifies the SPI baudrate */
207  SpiIf_ChMode mode; /**< \brief */
208  Spi_ErrorChecks errorChecks; /**< \brief */
209 };
210 
211 //________________________________________________________________________________________
212 // EXPORTED VARIABLES
213 
214 //________________________________________________________________________________________
215 // FUNCTION PROTOTYPES
216 
217 IFX_INLINE void SpiIf_wait(SpiIf_Ch *handle);
220 
221 /** \name Virtual functions
222  * These functions are implemented by a driver.
223  * \{ */
224 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData);
226 /** \} */
227 
228 /** \} */
229 //________________________________________________________________________________________
230 // INLINE FUNCTION IMPLEMENTATIONS
231 
232 /** Wait as long as the transmission is on-going
233  * \note This function blocks CPU for some-time */
235 {
236  while (handle->flags.onTransfer != FALSE)
237  {}
238 }
239 
240 
241 /** Perform the SPI exchange operation.
242  * \param src Pointer to the start of data buffer for data to transmit
243  * \param dest Pointer to the start of data buffer for received data
244  * \note the src and dest may be the same data location.
245  */
246 IFX_INLINE SpiIf_Status SpiIf_exchange(SpiIf_Ch *handle, const void *src, void *dest, Ifx_SizeT numOfData)
247 {
248  return handle->driver->functions.exchange(handle, src, dest, numOfData);
249 }
250 
251 
253 {
254  return handle->driver->functions.getStatus(handle);
255 }
256 
257 
258 //________________________________________________________________________________________
259 #endif