iLLD_TC27xC  1.0
IfxScu_PinMap.h
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1 /**
2  * \file IfxScu_PinMap.h
3  * \brief SCU I/O map
4  * \ingroup IfxLld_Scu
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Scu_pinmap SCU Pin Mapping
25  * \ingroup IfxLld_Scu
26  */
27 
28 #ifndef IFXSCU_PINMAP_H
29 #define IFXSCU_PINMAP_H
30 
31 #include <_Reg/IfxScu_reg.h>
32 #include <_Impl/IfxScu_cfg.h>
33 #include <Port/Std/IfxPort.h>
34 
35 /** \addtogroup IfxLld_Scu_pinmap
36  * \{ */
37 
38 /** \brief EVR Wakeup pin mapping structure */
39 typedef const struct
40 {
41  Ifx_SCU* module; /**< \brief Base address */
42  IfxPort_Pin pin; /**< \brief Port pin */
43  Ifx_RxSel select; /**< \brief Input multiplexer value */
45 
46 /** \brief Hardware Configuration pin mapping structure */
47 typedef const struct
48 {
49  Ifx_SCU* module; /**< \brief Base address */
50  IfxPort_Pin pin; /**< \brief Port pin */
52 
53 /** \brief External Request pin mapping structure */
54 typedef const struct
55 {
56  Ifx_SCU* module; /**< \brief Base address */
57  uint8 requestId; /**< \brief Request ID */
58  IfxPort_Pin pin; /**< \brief Port pin */
60 
61 /** \brief DCDC Sync pin mapping structure */
62 typedef const struct
63 {
64  Ifx_SCU* module; /**< \brief Base address */
65  IfxPort_Pin pin; /**< \brief Port pin */
66  IfxPort_OutputIdx select; /**< \brief Port control code */
68 
69 /** \brief Emergency Stop pin mapping structure */
70 typedef const struct
71 {
72  Ifx_SCU* module; /**< \brief Base address */
73  IfxPort_Pin pin; /**< \brief Port pin */
74  Ifx_RxSel select; /**< \brief Input multiplexer value */
76 
77 /** \brief Watchdog Timer Lock pin mapping structure */
78 typedef const struct
79 {
80  Ifx_SCU* module; /**< \brief Base address */
81  IfxPort_Pin pin; /**< \brief Port pin */
82  IfxPort_OutputIdx select; /**< \brief Port control code */
84 
85 /** \brief External Clock pin mapping structure */
86 typedef const struct
87 {
88  Ifx_SCU* module; /**< \brief Base address */
89  IfxPort_Pin pin; /**< \brief Port pin */
90  IfxPort_OutputIdx select; /**< \brief Port control code */
92 
93 IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P32_2_OUT; /**< \brief SCU_DCDCSYNC: SCU output */
94 IFX_EXTERN IfxScu_Dcdcsync_Out IfxScu_DCDCSYNC_P33_13_OUT; /**< \brief SCU_DCDCSYNC: SCU output */
95 IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPA_P33_8_IN; /**< \brief SCU_EMGSTOPA: SCU input */
96 IFX_EXTERN IfxScu_Emgstop_In IfxScu_EMGSTOPB_P21_2_IN; /**< \brief SCU_EMGSTOPB: SCU input */
97 IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPA_P14_1_IN; /**< \brief SCU_EVRWUPA: SCU input */
98 IFX_EXTERN IfxScu_Evrwup_In IfxScu_EVRWUPB_P15_1_IN; /**< \brief SCU_EVRWUPB: SCU input */
99 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK0_P23_1_OUT; /**< \brief SCU_EXTCLK0: SCU output */
100 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P11_12_OUT; /**< \brief SCU_EXTCLK1: SCU output */
101 IFX_EXTERN IfxScu_Extclk_Out IfxScu_EXTCLK1_P32_4_OUT; /**< \brief SCU_EXTCLK1: SCU output */
102 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG0DCLDO_P14_6_IN; /**< \brief SCU_HWCFG0DCLDO: SCU input If EVR13 active, latched at cold power on reset to decide between LDO and SMPS mode. */
103 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG1EVR33_P14_5_IN; /**< \brief SCU_HWCFG1EVR33: SCU input Latched at cold power on reset to decide EVR33 activation. */
104 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG2EVR13_P14_2_IN; /**< \brief SCU_HWCFG2EVR13: SCU input Latched at cold power on reset to decide EVR13 activation. */
105 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG3_BMI_P14_3_IN; /**< \brief SCU_HWCFG3_BMI: SCU input */
106 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG4_P10_5_IN; /**< \brief SCU_HWCFG4: SCU input */
107 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG5_P10_6_IN; /**< \brief SCU_HWCFG5: SCU input */
108 IFX_EXTERN IfxScu_Hwcfg_In IfxScu_HWCFG6_P14_4_IN; /**< \brief SCU_HWCFG6: SCU input Latched at cold power on reset to decide default pad reset state (PU or High-Z). */
109 IFX_EXTERN IfxScu_Req_In IfxScu_REQ0_P15_4_IN; /**< \brief SCU_REQ0: SCU input */
110 IFX_EXTERN IfxScu_Req_In IfxScu_REQ10_P14_3_IN; /**< \brief SCU_REQ10: SCU input */
111 IFX_EXTERN IfxScu_Req_In IfxScu_REQ11_P20_9_IN; /**< \brief SCU_REQ11: SCU input */
112 IFX_EXTERN IfxScu_Req_In IfxScu_REQ12_P11_10_IN; /**< \brief SCU_REQ12: SCU input */
113 IFX_EXTERN IfxScu_Req_In IfxScu_REQ13_P15_5_IN; /**< \brief SCU_REQ13: SCU input */
114 IFX_EXTERN IfxScu_Req_In IfxScu_REQ14_P02_1_IN; /**< \brief SCU_REQ14: SCU input */
115 IFX_EXTERN IfxScu_Req_In IfxScu_REQ15_P14_1_IN; /**< \brief SCU_REQ15: SCU input */
116 IFX_EXTERN IfxScu_Req_In IfxScu_REQ16_P15_1_IN; /**< \brief SCU_REQ16: SCU input */
117 IFX_EXTERN IfxScu_Req_In IfxScu_REQ1_P15_8_IN; /**< \brief SCU_REQ1: SCU input */
118 IFX_EXTERN IfxScu_Req_In IfxScu_REQ2_P10_2_IN; /**< \brief SCU_REQ2: SCU input */
119 IFX_EXTERN IfxScu_Req_In IfxScu_REQ3_P10_3_IN; /**< \brief SCU_REQ3: SCU input */
120 IFX_EXTERN IfxScu_Req_In IfxScu_REQ4_P10_7_IN; /**< \brief SCU_REQ4: SCU input */
121 IFX_EXTERN IfxScu_Req_In IfxScu_REQ5_P10_8_IN; /**< \brief SCU_REQ5: SCU input */
122 IFX_EXTERN IfxScu_Req_In IfxScu_REQ6_P02_0_IN; /**< \brief SCU_REQ6: SCU input */
123 IFX_EXTERN IfxScu_Req_In IfxScu_REQ7_P00_4_IN; /**< \brief SCU_REQ7: SCU input */
124 IFX_EXTERN IfxScu_Req_In IfxScu_REQ8_P33_7_IN; /**< \brief SCU_REQ8: SCU input */
125 IFX_EXTERN IfxScu_Req_In IfxScu_REQ9_P20_0_IN; /**< \brief SCU_REQ9: SCU input */
126 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT0LCK_P20_8_OUT; /**< \brief SCU_WDT0LCK: SCU output */
127 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT1LCK_P20_7_OUT; /**< \brief SCU_WDT1LCK: SCU output */
128 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDT2LCK_P20_6_OUT; /**< \brief SCU_WDT2LCK: SCU output */
129 IFX_EXTERN IfxScu_Wdtlck_Out IfxScu_WDTSLCK_P20_9_OUT; /**< \brief SCU_WDTSLCK: SCU output */
130 
131 /** \brief Table dimensions */
132 #define IFXSCU_PINMAP_NUM_MODULES 1
133 #define IFXSCU_PINMAP_NUM_REQUESTS 17
134 #define IFXSCU_PINMAP_DCDCSYNC_OUT_NUM_ITEMS 2
135 #define IFXSCU_PINMAP_EMGSTOP_IN_NUM_ITEMS 2
136 #define IFXSCU_PINMAP_EVRWUP_IN_NUM_ITEMS 2
137 #define IFXSCU_PINMAP_EXTCLK_OUT_NUM_ITEMS 3
138 #define IFXSCU_PINMAP_HWCFG_IN_NUM_ITEMS 7
139 #define IFXSCU_PINMAP_REQ_IN_NUM_ITEMS 1
140 #define IFXSCU_PINMAP_WDTLCK_OUT_NUM_ITEMS 4
141 
142 
143 /** \brief IfxScu_Dcdcsync_Out table */
145 
146 /** \brief IfxScu_Emgstop_In table */
148 
149 /** \brief IfxScu_Evrwup_In table */
151 
152 /** \brief IfxScu_Extclk_Out table */
154 
155 /** \brief IfxScu_Hwcfg_In table */
157 
158 /** \brief IfxScu_Req_In table */
160 
161 /** \brief IfxScu_Wdtlck_Out table */
163 
164 /** \} */
165 
166 #endif /* IFXSCU_PINMAP_H */