iLLD_TC27xC
1.0
IfxPsi5.h
Go to the documentation of this file.
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/**
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* \file IfxPsi5.h
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* \brief PSI5 basic functionality
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* \ingroup IfxLld_Psi5
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*
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* \version iLLD_0_1_0_10
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* \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
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*
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*
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* IMPORTANT NOTICE
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*
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*
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* Infineon Technologies AG (Infineon) is supplying this file for use
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* exclusively with Infineon's microcontroller products. This file can be freely
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* distributed within development tools that are supporting such microcontroller
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* products.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
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* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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* \defgroup IfxLld_Psi5 PSI5
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* \ingroup IfxLld
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* \defgroup IfxLld_Psi5_Std Standard Driver
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* \ingroup IfxLld_Psi5
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* \defgroup IfxLld_Psi5_Std_Enumerations Enumerations
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* \ingroup IfxLld_Psi5_Std
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* \defgroup IfxLld_Psi5_Std_Channel Channel Status Functions
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* \ingroup IfxLld_Psi5_Std
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* \defgroup IfxLld_Psi5_Std_IO IO Pin Configuration Functions
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* \ingroup IfxLld_Psi5_Std
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*/
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#ifndef IFXPSI5_H
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#define IFXPSI5_H 1
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/******************************************************************************/
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/*----------------------------------Includes----------------------------------*/
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/******************************************************************************/
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#include "
_Impl/IfxPsi5_cfg.h
"
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#include "
_PinMap/IfxPsi5_PinMap.h
"
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/******************************************************************************/
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/*--------------------------------Enumerations--------------------------------*/
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/******************************************************************************/
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/** \addtogroup IfxLld_Psi5_Std_Enumerations
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* \{ */
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/** \brief MODULE_PSI5.IOCRx.ALTI(x = 0,1,2),Alternate input selection
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*/
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typedef
enum
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{
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IfxPsi5_AlternateInput_0
= 0,
/**< \brief Alternate Input 0 */
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IfxPsi5_AlternateInput_1
,
/**< \brief Alternate Input 1 */
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IfxPsi5_AlternateInput_2
,
/**< \brief Alternate Input 2 */
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IfxPsi5_AlternateInput_3
,
/**< \brief Alternate Input 3 */
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}
IfxPsi5_AlternateInput
;
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/** \brief MODULE_PSI5.RCRCx.BRS(x = 0,1,2),Baud rate selection
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*/
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typedef
enum
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{
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IfxPsi5_BaudRate_125
= 0,
/**< \brief Slow 125 kHz clock */
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IfxPsi5_BaudRate_189
= 1
/**< \brief Fast 189 kHz clock */
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}
IfxPsi5_BaudRate
;
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/** \brief MODULE_PSI5.RCRBx.CRCy(x = 0,1,2; y=0,1,2,3,4,5),CRC or parity selection
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*/
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typedef
enum
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{
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IfxPsi5_CRCorParity_parity
= 0,
/**< \brief parity selection */
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IfxPsi5_CRCorParity_crc
= 1
/**< \brief CRC selection */
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}
IfxPsi5_CRCorParity
;
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/** \brief Clock type
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*/
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typedef
enum
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{
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IfxPsi5_ClockType_fracDiv
= 0,
/**< \brief Fractional Divide clock */
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IfxPsi5_ClockType_slowClock_125
= 1,
/**< \brief Slow 125 kHz clock */
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IfxPsi5_ClockType_fastClock_189
= 2,
/**< \brief Fast 189 kHz clock */
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IfxPsi5_ClockType_timeStamp
= 3
/**< \brief Timestamp clock */
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}
IfxPsi5_ClockType
;
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/** \brief MODULE_PSI5.IOCRx.DEPTH(x = 0,1,2),Digital input filter depth
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*/
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typedef
enum
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{
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IfxPsi5_DigitalInputFilterDepth_0
= 0,
/**< \brief Digital input filter depth is 0 */
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IfxPsi5_DigitalInputFilterDepth_1
,
/**< \brief Digital input filter depth is 1 */
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IfxPsi5_DigitalInputFilterDepth_2
,
/**< \brief Digital input filter depth is 2 */
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IfxPsi5_DigitalInputFilterDepth_3
,
/**< \brief Digital input filter depth is 3 */
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IfxPsi5_DigitalInputFilterDepth_4
,
/**< \brief Digital input filter depth is 4 */
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IfxPsi5_DigitalInputFilterDepth_5
,
/**< \brief Digital input filter depth is 5 */
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IfxPsi5_DigitalInputFilterDepth_6
,
/**< \brief Digital input filter depth is 6 */
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IfxPsi5_DigitalInputFilterDepth_7
,
/**< \brief Digital input filter depth is 7 */
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IfxPsi5_DigitalInputFilterDepth_8
,
/**< \brief Digital input filter depth is 8 */
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IfxPsi5_DigitalInputFilterDepth_9
,
/**< \brief Digital input filter depth is 9 */
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IfxPsi5_DigitalInputFilterDepth_10
,
/**< \brief Digital input filter depth is 10 */
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IfxPsi5_DigitalInputFilterDepth_11
,
/**< \brief Digital input filter depth is 11 */
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IfxPsi5_DigitalInputFilterDepth_12
,
/**< \brief Digital input filter depth is 12 */
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IfxPsi5_DigitalInputFilterDepth_13
,
/**< \brief Digital input filter depth is 13 */
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IfxPsi5_DigitalInputFilterDepth_14
,
/**< \brief Digital input filter depth is 14 */
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IfxPsi5_DigitalInputFilterDepth_15
,
/**< \brief Digital input filter depth is 15 */
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}
IfxPsi5_DigitalInputFilterDepth
;
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/** \brief MODULE_PSI5.FDR.DM,Divider mode
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*/
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typedef
enum
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{
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IfxPsi5_DividerMode_spb
= 0,
/**< \brief divider mode is off */
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IfxPsi5_DividerMode_normal
= 1,
/**< \brief divider mode is normal */
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IfxPsi5_DividerMode_fractional
= 2,
/**< \brief divider mode is fractional */
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IfxPsi5_DividerMode_off
= 3
/**< \brief divider mode is off */
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}
IfxPsi5_DividerMode
;
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/** \brief MODULE_PSI5.RCRBx.FECy(x = 0,1,2; y=0,1,2,3,4,5),Frame expectation control
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*/
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typedef
enum
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{
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IfxPsi5_FrameExpectation_notExpected
= 0,
/**< \brief No frame is expected */
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IfxPsi5_FrameExpectation_expected
= 1
/**< \brief Frame is expected */
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}
IfxPsi5_FrameExpectation
;
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/** \brief MODULE_PSI5.RCRBx.MSGy(x = 0,1,2; y=0,1,2,3,4,5),Messaging bits presence
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*/
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typedef
enum
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{
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IfxPsi5_MessagingBits_absent
= 0,
/**< \brief No messaging bits */
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IfxPsi5_MessagingBits_present
= 1
/**< \brief 2 messaging bits */
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}
IfxPsi5_MessagingBits
;
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/** \brief MODULE_PSI5.RCRCx.TSR(x = 0,1,2),Timestamp select for receive data registers
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*/
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typedef
enum
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{
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IfxPsi5_ReceiveDataRegisterTimestamp_pulse
= 0,
/**< \brief Pulse based timestamp SPTSC to be stored in RDRHC */
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IfxPsi5_ReceiveDataRegisterTimestamp_frame
= 1
/**< \brief Start of frame based timestamp SPTSC to be stored in RDRHC */
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}
IfxPsi5_ReceiveDataRegisterTimestamp
;
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/** \brief MODULE_PSI5.RDRHx.SC(x = 0-2),Slot Id
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*/
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typedef
enum
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{
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IfxPsi5_Slot_0
= 0,
/**< \brief slot 0 */
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IfxPsi5_Slot_1
,
/**< \brief slot 1 */
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IfxPsi5_Slot_2
,
/**< \brief slot 2 */
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IfxPsi5_Slot_3
,
/**< \brief slot 3 */
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IfxPsi5_Slot_4
,
/**< \brief slot 4 */
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IfxPsi5_Slot_5
,
/**< \brief slot 5 */
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}
IfxPsi5_Slot
;
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/** \brief MODULE_PSI5.PGCx.TBS(x = 0,1,2),Time base
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*/
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typedef
enum
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{
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IfxPsi5_TimeBase_internal
= 0,
/**< \brief Internal time stamp clock */
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IfxPsi5_TimeBase_external
= 1
/**< \brief External GTM inputs */
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}
IfxPsi5_TimeBase
;
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/** \brief MODULE_PSI5.RCRCx.TSP(x = 0,1,2),MODULE_PSI5.RCRCx.TSF(x = 0,1,2)Timestamp register type
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*/
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typedef
enum
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{
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IfxPsi5_TimestampRegister_a
= 0,
/**< \brief Timestamp register A */
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IfxPsi5_TimestampRegister_b
= 1,
/**< \brief Timestamp register B */
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IfxPsi5_TimestampRegister_c
= 2
/**< \brief Timestamp register C */
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}
IfxPsi5_TimestampRegister
;
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/** \brief MODULE_PSI5.PGCx.ETS(x = 0,1,2),Trigger Id
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*/
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typedef
enum
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{
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IfxPsi5_Trigger_0
= 0,
/**< \brief trigger 0 */
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IfxPsi5_Trigger_1
,
/**< \brief trigger 1 */
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IfxPsi5_Trigger_2
,
/**< \brief trigger 2 */
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IfxPsi5_Trigger_3
,
/**< \brief trigger 3 */
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IfxPsi5_Trigger_4
,
/**< \brief trigger 4 */
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IfxPsi5_Trigger_5
,
/**< \brief trigger 5 */
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}
IfxPsi5_Trigger
;
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/** \brief Trigger type
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*/
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typedef
enum
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{
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IfxPsi5_TriggerType_periodic
= 0,
/**< \brief Periodic trigger */
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IfxPsi5_TriggerType_external
= 1,
/**< \brief External trigger */
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IfxPsi5_TriggerType_bypass
= 2
/**< \brief Bypassed trigger */
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}
IfxPsi5_TriggerType
;
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/** \brief MODULE_PSI5.RCRBx.VBSy(x = 0,1,2; y=0,1,2,3,4,5),Verbose mode
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*/
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typedef
enum
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{
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IfxPsi5_Verbose_off
= 0,
/**< \brief Verbose mode is turned off */
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IfxPsi5_Verbose_on
= 1
/**< \brief Verbose mode is turned on */
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}
IfxPsi5_Verbose
;
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/** \} */
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/** \addtogroup IfxLld_Psi5_Std_Channel
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* \{ */
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/******************************************************************************/
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/*-------------------------Inline Function Prototypes-------------------------*/
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/******************************************************************************/
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/** \brief access function to get the CRCI status register contents for a channel
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* \param psi5 pointer to the PSI5 register space
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* \param channel channel Id
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* \return Crci status register contents
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*/
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IFX_INLINE
uint32
IfxPsi5_getStatusCrci
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel);
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/** \brief access function to get the MEI status register contents for a channel
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* \param psi5 pointer to the PSI5 register space
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* \param channel channel Id
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* \return Mei status register contents
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*/
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IFX_INLINE
uint32
IfxPsi5_getStatusMei
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel);
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/** \brief access function to get the NBI status register contents for a channel
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* \param psi5 pointer to the PSI5 register space
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* \param channel channel Id
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* \return Nbi status register contents
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*/
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IFX_INLINE
uint32
IfxPsi5_getStatusNbi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel);
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/** \brief access function to get the NFI status register contents for a channel
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* \param psi5 pointer to the PSI5 register space
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* \param channel channel Id
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* \return Nfi status register contents
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*/
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IFX_INLINE
uint32
IfxPsi5_getStatusNfi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel);
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/** \brief access function to get the RDI status register contents for a channel
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* \param psi5 pointer to the PSI5 register space
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* \param channel channel Id
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* \return Rdi status register contents
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*/
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IFX_INLINE
uint32
IfxPsi5_getStatusRdi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel);
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/** \brief access function to get the RMI status register contents for a channel
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* \param psi5 pointer to the PSI5 register space
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* \param channel channel Id
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* \return Rmi status register contents
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*/
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IFX_INLINE
uint32
IfxPsi5_getStatusRmi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel);
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/** \brief access function to get the RSI status register contents for a channel
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* \param psi5 pointer to the PSI5 register space
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* \param channel channel Id
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* \return Rsi status register contents
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*/
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IFX_INLINE
uint32
IfxPsi5_getStatusRsi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel);
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/** \brief access function to get the TEI status register contents for a channel
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* \param psi5 pointer to the PSI5 register space
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* \param channel channel Id
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* \return Tei status register contents
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*/
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IFX_INLINE
uint32
IfxPsi5_getStatusTei
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel);
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/** \} */
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/** \addtogroup IfxLld_Psi5_Std_IO
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* \{ */
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/******************************************************************************/
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/*-------------------------Inline Function Prototypes-------------------------*/
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/******************************************************************************/
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/** \brief Sets the alternate RX input
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* \param psi5Ch pointer to the PSI5 channel register space
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* \param alternateInput Alternate RX input selection
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* \return None
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*/
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IFX_INLINE
void
IfxPsi5_setRxInput
(Ifx_PSI5_CH *psi5Ch,
IfxPsi5_AlternateInput
alternateInput);
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/** \brief Initializes a RX input
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* \param rx the RX Pin which should be configured
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* \param inputMode pin input mode which should be configured
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* \return None
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*/
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IFX_INLINE
void
IfxPsi5_initRxPin
(
const
IfxPsi5_Rx_In
*rx,
IfxPort_InputMode
inputMode);
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/** \brief Initializes a TX output
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* \param tx the TX Pin which should be configured
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* \param outputMode the pin output mode which should be configured
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* \param padDriver the pad driver mode which should be configured
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* \return None
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*/
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IFX_INLINE
void
IfxPsi5_initTxPin
(
const
IfxPsi5_Tx_Out
*tx,
IfxPort_OutputMode
outputMode,
IfxPort_PadDriver
padDriver);
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/** \} */
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/******************************************************************************/
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/*---------------------Inline Function Implementations------------------------*/
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/******************************************************************************/
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IFX_INLINE
uint32
IfxPsi5_getStatusCrci
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel)
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{
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return
psi5->CRCIOV[channel].U;
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}
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IFX_INLINE
uint32
IfxPsi5_getStatusMei
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel)
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{
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return
psi5->MEIOV[channel].U;
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}
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IFX_INLINE
uint32
IfxPsi5_getStatusNbi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel)
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{
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return
psi5->NBIOV[channel].U;
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}
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IFX_INLINE
uint32
IfxPsi5_getStatusNfi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel)
323
{
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return
psi5->NFIOV[channel].U;
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}
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IFX_INLINE
uint32
IfxPsi5_getStatusRdi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel)
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{
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return
psi5->RDIOV[channel].U;
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}
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IFX_INLINE
uint32
IfxPsi5_getStatusRmi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel)
335
{
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return
psi5->RMIOV[channel].U;
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}
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IFX_INLINE
uint32
IfxPsi5_getStatusRsi
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel)
341
{
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return
psi5->RSIOV[channel].U;
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}
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IFX_INLINE
uint32
IfxPsi5_getStatusTei
(Ifx_PSI5 *psi5,
IfxPsi5_ChannelId
channel)
347
{
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return
psi5->TEIOV[channel].U;
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}
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IFX_INLINE
void
IfxPsi5_setRxInput
(Ifx_PSI5_CH *psi5Ch,
IfxPsi5_AlternateInput
alternateInput)
353
{
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uint16
passwd =
IfxScuWdt_getCpuWatchdogPassword
();
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IfxScuWdt_clearCpuEndinit
(passwd);
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psi5Ch->IOCR.B.ALTI = alternateInput;
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IfxScuWdt_setCpuEndinit
(passwd);
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}
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IFX_INLINE
void
IfxPsi5_initRxPin
(
const
IfxPsi5_Rx_In
*rx,
IfxPort_InputMode
inputMode)
362
{
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IfxPort_setPinModeInput
(rx->
pin
.
port
, rx->
pin
.
pinIndex
, inputMode);
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Ifx_PSI5 *psi5 = rx->
module
;
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Ifx_PSI5_CH *psi5Ch = &psi5->CH[rx->
channelId
];
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IfxPsi5_setRxInput
(psi5Ch, (
IfxPsi5_AlternateInput
)rx->
select
);
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}
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IFX_INLINE
void
IfxPsi5_initTxPin
(
const
IfxPsi5_Tx_Out
*tx,
IfxPort_OutputMode
outputMode,
IfxPort_PadDriver
padDriver)
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{
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IfxPort_setPinModeOutput
(tx->
pin
.
port
, tx->
pin
.
pinIndex
, outputMode, tx->
select
);
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IfxPort_setPinPadDriver
(tx->
pin
.
port
, tx->
pin
.
pinIndex
, padDriver);
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}
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#endif
/* IFXPSI5_H */
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Std
IfxPsi5.h
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