30 #include "IfxGtm_bf.h"
39 #define IFXGTM_TOM_TGC_CHANNEL_COUNT (8)
64 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
66 tomCh->IRQ_NOTIFY.B.CCU1TC = 1;
72 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
74 tomCh->IRQ_NOTIFY.B.CCU0TC = 1;
105 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
107 clock = tomCh->CTRL.B.CLK_SRC_SR;
116 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
118 result = tomCh->STAT.B.OL == 1;
126 return &MODULE_SRC.GTM.GTM[0].TOM[tom][channel / 2];
149 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
150 return (
volatile uint32 *)&tomCh->CN0;
157 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
159 result = tomCh->IRQ_NOTIFY.B.CCU1TC != 0;
168 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
170 result = tomCh->IRQ_NOTIFY.B.CCU0TC != 0;
178 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
180 tomCh->IRQ_FORCINT.B.TRG_CCU1TC0 = 1;
186 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
188 tomCh->IRQ_FORCINT.B.TRG_CCU0TC0 = 1;
194 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
196 tomCh->CTRL.B.CLK_SRC_SR = clock;
202 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
204 tomCh->CM0.U = compareZero;
205 tomCh->CM1.U = compareOne;
211 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
213 tomCh->CM1.U = compareOne;
219 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
221 tomCh->SR1.U = shadowOne;
227 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
229 tomCh->SR0.U = shadowZero;
230 tomCh->SR1.U = shadowOne;
236 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
238 tomCh->CM0.U = compareZero;
244 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
246 tomCh->SR0.U = shadowZero;
252 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
254 tomCh->CN0.U = value;
262 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
263 tomCh->CTRL.B.GCM = enabled ? 1 : 0;
272 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
274 Ifx_GTM_TOM_CH_IRQ_EN en;
276 en.U = tomCh->IRQ_EN.U;
279 tomCh->IRQ_EN.U =
ZEROS;
280 tomCh->IRQ_MODE.B.IRQ_MODE = mode;
281 tomCh->IRQ_EN.U = en.U;
283 en.B.CCU0TC_IRQ_EN = interruptOnCompareZero ? 1 : 0;
284 en.B.CCU1TC_IRQ_EN = interruptOnCompareOne ? 1 : 0;
285 tomCh->IRQ_EN.U = en.U;
291 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
293 tomCh->CTRL.B.OSM = enabled ? 1 : 0;
301 tom->CH15.CTRL.B.BITREV = enabled ? 1 : 0;
310 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
312 tomCh->CTRL.B.RST_CCU0 = event;
318 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
328 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
329 tomCh->CTRL.B.SPEM = enabled ? 1 : 0;
338 Ifx_GTM_TOM_CH *tomCh = (Ifx_GTM_TOM_CH *)((
uint32)&tom->CH0.CTRL.U + 0x40 * channel);
340 tomCh->CTRL.B.TRIGOUT = trigger;
348 uint32 mask = enableMask | (disableMask << 16);
353 uint8 shift = (i * 2) + bitfieldOffset;
377 value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_ENDIS_CTRL_ENDIS_CTRL0_OFF);
395 value = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_OUTEN_CTRL_OUTEN_CTRL0_OFF);
411 tgc->
INT_TRIG.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_INT_TRIG_INT_TRIG0_OFF);
417 tgc->
GLB_CTRL.U = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_GLB_CTRL_UPEN_CTRL0_OFF);
423 tgc->
ACT_TB.B.TB_TRIG = enabled ? 1 : 0;
439 resetMask = resetMask >> 1;
442 tgc->
GLB_CTRL.U = reg << IFX_GTM_TOM_TGC0_GLB_CTRL_RST_CH0_OFF;
448 uint32 regEnable, regReset;
450 regEnable = IfxGtm_Tom_Tgc_buildFeature(enableMask, disableMask, IFX_GTM_TOM_TGC0_FUPD_CTRL_FUPD_CTRL0_OFF);
451 regReset = IfxGtm_Tom_Tgc_buildFeature(resetEnableMask, resetDisableMask, IFX_GTM_TOM_TGC0_FUPD_CTRL_RSTCN0_CH0_OFF);
459 Ifx_GTM_TOM_TGC0_ACT_TB act_tb;
462 act_tb.B.TBU_SEL = base;
463 act_tb.B.ACT_TB = value;
470 tgc->
GLB_CTRL.U = 1 << IFX_GTM_TOM_TGC0_GLB_CTRL_HOST_TRIG_OFF;