iLLD_TC27xC  1.0
IfxAsclin_PinMap.h
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1 /**
2  * \file IfxAsclin_PinMap.h
3  * \brief ASCLIN I/O map
4  * \ingroup IfxLld_Asclin
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Asclin_pinmap ASCLIN Pin Mapping
25  * \ingroup IfxLld_Asclin
26  */
27 
28 #ifndef IFXASCLIN_PINMAP_H
29 #define IFXASCLIN_PINMAP_H
30 
31 #include <_Reg/IfxAsclin_reg.h>
32 #include <_Impl/IfxAsclin_cfg.h>
33 #include <Port/Std/IfxPort.h>
34 
35 /** \addtogroup IfxLld_Asclin_pinmap
36  * \{ */
37 
38 /** \brief CTS pin mapping structure */
39 typedef const struct
40 {
41  Ifx_ASCLIN* module; /**< \brief Base address */
42  IfxPort_Pin pin; /**< \brief Port pin */
43  Ifx_RxSel select; /**< \brief Input multiplexer value */
45 
46 /** \brief RX pin mapping structure */
47 typedef const struct
48 {
49  Ifx_ASCLIN* module; /**< \brief Base address */
50  IfxPort_Pin pin; /**< \brief Port pin */
51  Ifx_RxSel select; /**< \brief Input multiplexer value */
53 
54 /** \brief RTS pin mapping structure */
55 typedef const struct
56 {
57  Ifx_ASCLIN* module; /**< \brief Base address */
58  IfxPort_Pin pin; /**< \brief Port pin */
59  IfxPort_OutputIdx select; /**< \brief Port control code */
61 
62 /** \brief SCLK pin mapping structure */
63 typedef const struct
64 {
65  Ifx_ASCLIN* module; /**< \brief Base address */
66  IfxPort_Pin pin; /**< \brief Port pin */
67  IfxPort_OutputIdx select; /**< \brief Port control code */
69 
70 /** \brief SLSO pin mapping structure */
71 typedef const struct
72 {
73  Ifx_ASCLIN* module; /**< \brief Base address */
74  IfxPort_Pin pin; /**< \brief Port pin */
75  IfxPort_OutputIdx select; /**< \brief Port control code */
77 
78 /** \brief TX pin mapping structure */
79 typedef const struct
80 {
81  Ifx_ASCLIN* module; /**< \brief Base address */
82  IfxPort_Pin pin; /**< \brief Port pin */
83  IfxPort_OutputIdx select; /**< \brief Port control code */
85 
86 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN; /**< \brief ASCLIN0_CTSA: ASCLIN0 input */
87 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN; /**< \brief ASCLIN1_CTSA: ASCLIN1 input */
88 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN; /**< \brief ASCLIN1_CTSB: ASCLIN1 input */
89 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN; /**< \brief ASCLIN2_CTSA: ASCLIN2 input */
90 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN; /**< \brief ASCLIN2_CTSB: ASCLIN2 input */
91 IFX_EXTERN IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN; /**< \brief ASCLIN3_CTSA: ASCLIN3 input */
92 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT; /**< \brief ASCLIN0_RTS: ASCLIN0 output */
93 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT; /**< \brief ASCLIN1_RTS: ASCLIN1 output */
94 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT; /**< \brief ASCLIN1_RTS: ASCLIN1 output */
95 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT; /**< \brief ASCLIN2_RTS: ASCLIN2 output */
96 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT; /**< \brief ASCLIN2_RTS: ASCLIN2 output */
97 IFX_EXTERN IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT; /**< \brief ASCLIN3_RTS: ASCLIN3 output */
98 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN; /**< \brief ASCLIN0_RXA: ASCLIN0 input Recommended as Boot loader pin. */
99 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN; /**< \brief ASCLIN0_RXB: ASCLIN0 input */
100 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin0_RXD_P34_2_IN; /**< \brief ASCLIN0_RXD: ASCLIN0 input */
101 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN; /**< \brief ASCLIN1_RXA: ASCLIN1 input */
102 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN; /**< \brief ASCLIN1_RXB: ASCLIN1 input */
103 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN; /**< \brief ASCLIN1_RXC: ASCLIN1 input */
104 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN; /**< \brief ASCLIN1_RXD: ASCLIN1 input */
105 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN; /**< \brief ASCLIN1_RXE: ASCLIN1 input */
106 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN; /**< \brief ASCLIN1_RXF: ASCLIN1 input */
107 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN; /**< \brief ASCLIN1_RXG: ASCLIN1 input */
108 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN; /**< \brief ASCLIN2_RXA: ASCLIN2 input */
109 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN; /**< \brief ASCLIN2_RXB: ASCLIN2 input */
110 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN; /**< \brief ASCLIN2_RXC: ASCLIN2 input */
111 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN; /**< \brief ASCLIN2_RXD: ASCLIN2 input */
112 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN; /**< \brief ASCLIN2_RXE: ASCLIN2 input */
113 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN; /**< \brief ASCLIN2_RXF: ASCLIN2 input */
114 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN; /**< \brief ASCLIN2_RXG: ASCLIN2 input */
115 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN; /**< \brief ASCLIN3_RXA: ASCLIN3 input */
116 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN; /**< \brief ASCLIN3_RXB: ASCLIN3 input */
117 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN; /**< \brief ASCLIN3_RXC: ASCLIN3 input */
118 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN; /**< \brief ASCLIN3_RXD: ASCLIN3 input */
119 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN; /**< \brief ASCLIN3_RXE: ASCLIN3 input */
120 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN; /**< \brief ASCLIN3_RXF: ASCLIN3 input */
121 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN; /**< \brief ASCLIN3_RX3GN: ASCLIN3 input (LVDS) */
122 IFX_EXTERN IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN; /**< \brief ASCLIN3_RX3GP: ASCLIN3 input (LVDS) */
123 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P14_0_OUT; /**< \brief ASCLIN0_SCLK: ASCLIN0 output */
124 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin0_SCLK_P15_2_OUT; /**< \brief ASCLIN0_SCLK: ASCLIN0 output */
125 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P15_0_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
126 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P20_10_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
127 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_11_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
128 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin1_SCLK_P33_12_OUT; /**< \brief ASCLIN1_SCLK: ASCLIN1 output */
129 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P02_4_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
130 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P10_6_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
131 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P14_2_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
132 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_7_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
133 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin2_SCLK_P33_9_OUT; /**< \brief ASCLIN2_SCLK: ASCLIN2 output */
134 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_0_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
135 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P00_2_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
136 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_1_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
137 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P11_4_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
138 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_6_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
139 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P15_8_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
140 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P20_0_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
141 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_5_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
142 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P21_7_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
143 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P32_3_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
144 IFX_EXTERN IfxAsclin_Sclk_Out IfxAsclin3_SCLK_P33_2_OUT; /**< \brief ASCLIN3_SCLK: ASCLIN3 output */
145 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P14_3_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
146 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P20_8_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
147 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin1_SLSO_P33_10_OUT; /**< \brief ASCLIN1_SLSO: ASCLIN1 output */
148 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P02_3_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
149 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P10_5_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
150 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin2_SLSO_P33_6_OUT; /**< \brief ASCLIN2_SLSO: ASCLIN2 output */
151 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P00_3_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
152 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P12_1_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
153 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P14_3_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
154 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_2_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
155 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P21_6_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
156 IFX_EXTERN IfxAsclin_Slso_Out IfxAsclin3_SLSO_P33_1_OUT; /**< \brief ASCLIN3_SLSO: ASCLIN3 output */
157 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output Recommended as Boot loader pin. */
158 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
159 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
160 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
161 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin0_TX_P34_1_OUT; /**< \brief ASCLIN0_TX: ASCLIN0 output */
162 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
163 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
164 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
165 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
166 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
167 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
168 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
169 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
170 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
171 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT; /**< \brief ASCLIN1_TX: ASCLIN1 output */
172 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
173 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
174 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
175 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
176 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
177 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
178 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
179 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT; /**< \brief ASCLIN2_TX: ASCLIN2 output */
180 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
181 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
182 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
183 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
184 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
185 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
186 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
187 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
188 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
189 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT; /**< \brief ASCLIN3_TXN: ASCLIN3 output (LVDS) */
190 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT; /**< \brief ASCLIN3_TXP: ASCLIN3 output (LVDS) */
191 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
192 IFX_EXTERN IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT; /**< \brief ASCLIN3_TX: ASCLIN3 output */
193 
194 /** \brief Table dimensions */
195 #define IFXASCLIN_PINMAP_NUM_MODULES 4
196 #define IFXASCLIN_PINMAP_CTS_IN_NUM_ITEMS 2
197 #define IFXASCLIN_PINMAP_RTS_OUT_NUM_ITEMS 2
198 #define IFXASCLIN_PINMAP_RX_IN_NUM_ITEMS 7
199 #define IFXASCLIN_PINMAP_SCLK_OUT_NUM_ITEMS 11
200 #define IFXASCLIN_PINMAP_SLSO_OUT_NUM_ITEMS 6
201 #define IFXASCLIN_PINMAP_TX_OUT_NUM_ITEMS 13
202 
203 
204 /** \brief IfxAsclin_Cts_In table */
206 
207 /** \brief IfxAsclin_Rts_Out table */
209 
210 /** \brief IfxAsclin_Rx_In table */
212 
213 /** \brief IfxAsclin_Sclk_Out table */
215 
216 /** \brief IfxAsclin_Slso_Out table */
218 
219 /** \brief IfxAsclin_Tx_Out table */
221 
222 /** \} */
223 
224 #endif /* IFXASCLIN_PINMAP_H */