102 for (i = 2; i <= 32; i += 2)
107 if (
__leqf(error, bestError))
119 *targetFreq = sourceFreq / bestDiv;
121 return (bestDiv / 2) - 1;
133 Ifx_DSADC_CH_FCFGA fcfga;
146 (channel->
channel)->FCFGA = fcfga;
152 Ifx_DSADC_CGCFG cgcfg;
158 cgcfg.B.DIVCG = IfxDsadc_Dsadc_calcDIVx(sourceFreq / (32 * 32), &targetFreq);
163 dsadc->
dsadc->CGCFG = cgcfg;
183 Ifx_DSADC *dsadc = config->
module;
189 IfxDsadc_Dsadc_initModulator(channel, &config->
modulator);
190 IfxDsadc_Dsadc_initDemodulator(channel, &config->
demodulator);
191 IfxDsadc_Dsadc_initCombFilter(channel, &config->
combFilter);
192 IfxDsadc_Dsadc_initFirFilter(channel, &config->
firFilter);
193 IfxDsadc_Dsadc_initIntegrator(channel, &config->
integrator);
194 IfxDsadc_Dsadc_initAuxFilter(channel, &config->
auxFilter);
195 IfxDsadc_Dsadc_initRectifier(channel, &config->
rectifier);
247 .modulatorClockFreq = 10.0e6,
263 .decimationFactor = 50,
267 .fir0Enabled =
FALSE,
268 .fir1Enabled =
FALSE,
269 .offsetCompensation =
FALSE,
276 .integrationCount = 20,
277 .integrationCycles = 1,
286 .decimationFactor = 4,
291 *config = IfxDsadc_Dsadc_defaultChannelConfig;
298 Ifx_DSADC_CH_FCFGC fcfgc;
311 (channel->
channel)->FCFGC = fcfgc;
317 Ifx_DSADC_CH_DICFG dicfg;
333 (channel->
channel)->DICFG = dicfg;
339 Ifx_DSADC_CH_FCFGM fcfgm;
349 (channel->
channel)->FCFGM = fcfgm;
355 Ifx_DSADC_CH_IWCTR iwctr;
364 (channel->
channel)->IWCTR = iwctr;
370 Ifx_DSADC_CH_MODCFG modcfg;
382 modcfg.B.DIVM = IfxDsadc_Dsadc_calcDIVx(sourceFreq, &targetFreq);
389 (channel->
channel)->MODCFG = modcfg;
395 Ifx_DSADC *dsadcSFR = config->
dsadc;
397 dsadc->
dsadc = dsadcSFR;
402 dsadcSFR->CLC.U = 0x00000000;
410 Ifx_DSADC_GLOBCFG globcfg;
411 globcfg.U = dsadcSFR->GLOBCFG.U;
417 dsadcSFR->GLOBCFG.U = globcfg.U;
430 *config = IfxDsadc_Dsadc_defaultConfig;
431 config->
dsadc = dsadc;
437 Ifx_DSADC_CH_RECTCFG rect;
442 (channel->
channel)->RECTCFG = rect;