1189 Ifx_CCU6_TCTR4 tctr4;
1191 tctr4.B.T12RES = t12;
1192 tctr4.B.T13RES = t13;
1193 ccu6->TCTR4.U = tctr4.U;
1199 ccu6->TCTR4.B.DTRES =
TRUE;
1205 uint32 mask = (1U << source);
1206 ccu6->ISR.U = ccu6->ISR.U & ~(mask);
1212 return ccu6->CLC.B.DISS == 0;
1218 uint32 shift = ((timer * 2) + 2);
1219 uint32 mask = (0x3U << shift);
1220 ccu6->PISEL2.U = (ccu6->PISEL2.U & ~mask) | ((
uint32)mode << shift);
1226 ccu6->MCMOUTS.B.CURHS = pattern;
1232 ccu6->T12DTC.B.DTM = value;
1238 ccu6->MCMOUTS.B.EXPHS = pattern;
1244 uint32 shift = ((timer * 2) + 8);
1245 uint32 mask = (0x3U << shift);
1246 ccu6->TCTR2.U = (ccu6->TCTR2.U & ~mask) | ((
uint32)mode << shift);
1253 uint32 mask = (0x7U << shift);
1254 ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((
uint32)mode << shift);
1260 uint32 shift = (timer * 8);
1261 uint32 mask = (0x7U << shift);
1262 ccu6->TCTR0.U = (ccu6->TCTR0.U & ~mask) | ((
uint32)frequency << shift);
1268 uint32 mask = (1U << source);
1269 ccu6->ISS.U = ccu6->ISS.U | (mask);
1275 ccu6->MCMOUTS.B.MCMPS = pattern;
1281 ccu6->MCMCTR.B.SWSEL = mode;
1287 ccu6->MCMCTR.B.SWSYN = sync;
1293 uint32 shift = (channelOut + 8);
1294 uint32 mask = (1U << shift);
1295 ccu6->CMPSTAT.U = (ccu6->CMPSTAT.U & ~mask) | ((
uint32)state << shift);
1301 Ifx_CCU6_TCTR2 tctr2;
1302 tctr2.U = ccu6->TCTR2.U;
1303 tctr2.B.T12SSC = t12;
1304 tctr2.B.T13SSC = t13;
1305 ccu6->TCTR2.U = tctr2.U;
1311 uint32 shift = (4 * channel);
1312 uint32 mask = (0xFU << shift);
1313 ccu6->T12MSEL.U = (ccu6->T12MSEL.U & ~mask) | ((
uint32)mode << shift);
1319 ccu6->TCTR0.B.CTM = mode;
1325 ccu6->T12.B.T12CV = value;
1331 ccu6->T12PR.B.T12PV = value - 1;
1337 ccu6->CC63SR.B.CCS = value;
1343 ccu6->T13.B.T13CV = value;
1349 ccu6->T13PR.B.T13PV = value - 1;
1355 ccu6->TCTR2.B.T13TED = direction;
1361 ccu6->TCTR2.B.T13TED = direction;
1367 ccu6->TCTR2.B.T13TEC = mode;
1373 ccu6->TRPCTR.B.TRPM2 = mode;
1380 ccu6->TRPCTR.U = (ccu6->TRPCTR.U & ~mask) | ((
uint32)state);
1386 Ifx_CCU6_TCTR4 tctr4;
1388 tctr4.B.T12RS = t12;
1389 tctr4.B.T13RS = t13;
1390 ccu6->TCTR4.U = tctr4.U;
1396 Ifx_CCU6_TCTR4 tctr4;
1398 tctr4.B.T12RR = t12;
1399 tctr4.B.T13RR = t13;
1400 ccu6->TCTR4.U = tctr4.U;
1406 Ifx_CCU6_MCMOUTS mcmouts;
1407 mcmouts.U = ccu6->MCMOUTS.U;
1409 mcmouts.B.CURHS = currentHall;
1410 mcmouts.B.EXPHS = expectedHall;
1411 mcmouts.B.MCMPS = output;
1413 ccu6->MCMOUTS.U = mcmouts.U;
1419 uint32 shift = (12 + channel);
1420 uint32 mask = 1 << shift;
1421 return (ccu6->T12DTC.U & mask) ?
TRUE :
FALSE;
1427 uint32 shift = (channel + 3);
1428 uint32 mask = (1U << shift);
1429 return (ccu6->CMPSTAT.U & mask) ?
TRUE :
FALSE;
1435 uint32 shift = (1U << source);
1436 return (ccu6->IS.U & shift) ?
TRUE :
FALSE;
1442 return ccu6->MCFG.B.MCM != 0;
1448 return ccu6->MCMOUT.B.R != 0;
1454 uint32 shift = ((timer * 8) + 5);
1455 uint32 mask = (1U << shift);
1456 return (ccu6->TCTR0.U & mask) ?
TRUE :
FALSE;
1462 uint32 mask = (1U << channel);
1463 return (ccu6->CMPSTAT.U & mask) ?
TRUE :
FALSE;
1475 return ccu6->CMPSTAT.B.CC63ST != 0;
1481 uint32 mask = (1U << timer);
1482 return (ccu6->MCFG.U & mask) ?
TRUE :
FALSE;
1488 uint32 shift = ((timer * 8) + 4);
1489 uint32 mask = (1U << shift);
1496 uint32 shift = ((timer * 8) + 3);
1497 uint32 mask = (1U << shift);
1498 ccu6->TCTR0.U = ccu6->TCTR0.U & ~(mask);
1504 uint32 shift = (8 + channel);
1505 uint32 mask = (1 << shift);
1506 ccu6->T12DTC.U = ccu6->T12DTC.U & ~(mask);
1512 ccu6->T12MSEL.B.DBYP =
FALSE;
1518 uint32 mask = (1U << source);
1519 ccu6->IEN.U = ccu6->IEN.U & ~(mask);
1525 ccu6->MODCTR.B.MCMEN =
FALSE;
1531 Ifx_CCU6_TCTR4 tctr4;
1533 tctr4.B.T12STD = t12;
1534 tctr4.B.T13STD = t13;
1535 ccu6->TCTR4.U = tctr4.U;
1541 uint32 mask = (1U << timer);
1542 ccu6->TCTR2.U = ccu6->TCTR2.U & ~(mask);
1548 ccu6->CMPSTAT.B.T13IM =
FALSE;
1554 uint32 mask = (1U << timer);
1555 ccu6->MCFG.U = ccu6->MCFG.U & ~(mask);
1561 uint32 shift = (8 + channelOut);
1562 uint32 mask = (1U << shift);
1563 ccu6->TRPCTR.U = ccu6->TRPCTR.U & ~(mask);
1569 ccu6->TRPCTR.B.TRPPEN =
FALSE;
1575 uint32 shift = ((timer * 8) + 2);
1576 uint32 mask = (1U << shift);
1577 ccu6->TCTR0.U = ccu6->TCTR0.U | (mask);
1583 Ifx_CCU6_TCTR4 tctr4;
1585 tctr4.B.T12CNT = t12;
1586 tctr4.B.T13CNT = t13;
1587 ccu6->TCTR4.U = tctr4.U;
1593 uint32 shift = (8 + channel);
1594 uint32 mask = (1 << shift);
1595 ccu6->T12DTC.U = ccu6->T12DTC.U | (mask);
1601 ccu6->T12MSEL.B.DBYP =
TRUE;
1607 ccu6->MCMOUTS.B.STRHP =
TRUE;
1613 uint32 mask = (1U << source);
1614 ccu6->IEN.U = ccu6->IEN.U | (mask);
1620 ccu6->MODCTR.B.MCMEN =
TRUE;
1626 ccu6->MCMOUTS.B.STRMCM =
TRUE;
1632 ccu6->MCMCTR.B.STE12D =
TRUE;
1638 ccu6->MCMCTR.B.STE12U =
TRUE;
1644 ccu6->MCMCTR.B.STE13U =
TRUE;
1650 Ifx_CCU6_TCTR4 tctr4;
1652 tctr4.B.T12STR = t12;
1653 tctr4.B.T13STR = t13;
1654 ccu6->TCTR4.U = tctr4.U;
1660 uint32 mask = (1U << timer);
1661 ccu6->TCTR2.U = ccu6->TCTR2.U | (mask);
1667 ccu6->CMPSTAT.B.T13IM =
TRUE;
1673 uint32 mask = (1U << timer);
1674 ccu6->MCFG.U = ccu6->MCFG.U | (mask);
1680 uint32 shift = (8 + channelOut);
1681 uint32 mask = (1U << shift);
1682 ccu6->TRPCTR.U = ccu6->TRPCTR.U | (mask);
1688 ccu6->TRPCTR.B.TRPPEN =
TRUE;
1694 uint32 shift = (2 * input);
1695 uint32 mask = (0x3U << shift);
1696 ccu6->PISEL0.U = (ccu6->PISEL0.U & ~mask) | ((
uint32)signal << shift);