iLLD_TC27xC  1.0
IfxFce_Crc.c
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1 /**
2  * \file IfxFce_Crc.c
3  * \brief FCE CRC details
4  *
5  * \version iLLD_0_1_0_10
6  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
7  *
8  *
9  * IMPORTANT NOTICE
10  *
11  *
12  * Infineon Technologies AG (Infineon) is supplying this file for use
13  * exclusively with Infineon's microcontroller products. This file can be freely
14  * distributed within development tools that are supporting such microcontroller
15  * products.
16  *
17  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
18  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
19  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
20  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
21  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
22  *
23  *
24  */
25 
26 /******************************************************************************/
27 /*----------------------------------Includes----------------------------------*/
28 /******************************************************************************/
29 
30 #include "IfxFce_Crc.h"
31 
32 /******************************************************************************/
33 /*-------------------------Function Implementations---------------------------*/
34 /******************************************************************************/
35 
36 uint16 IfxFce_Crc_calculateCrc16(IfxFce_Crc_Crc *fce, const uint16 *crcData, uint32 crcDataLength, uint16 crcStartValue)
37 {
38  Ifx_FCE *fceSFR = fce->fce;
39  uint32 inputDataCounter;
40  uint16 crcResultValue;
41  uint16 *dataPtr = (uint16 *)crcData;
42 
43  fceSFR->IN2.CHECK.U = 0xFACECAFE;
44  fceSFR->IN2.LENGTH.U = 0xFACECAFE;
45  fceSFR->IN2.CHECK.U = (uint16)fce->expectedCrc;
46  fceSFR->IN2.LENGTH.U = crcDataLength;
47 
48  /*Configure CRC register*/
49  fceSFR->IN2.CRC.U = crcStartValue;
50 
51  /*Code for CRC-16 calculaion with 0x1021 polynomial*/
52  for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
53  {
54  fceSFR->IN2.IR.U = *(dataPtr++);
55  }
56 
57  crcResultValue = fceSFR->IN2.RES.U;
58 
59  return crcResultValue;
60 }
61 
62 
63 uint32 IfxFce_Crc_calculateCrc32(IfxFce_Crc_Crc *fce, const uint32 *crcData, uint32 crcDataLength, uint32 crcStartValue)
64 {
65  Ifx_FCE *fceSFR = fce->fce;
66  uint32 inputDataCounter;
67  uint32 crcResultValue;
68  uint32 *dataPtr = (uint32 *)crcData;
69  volatile uint32 *inPtr;
70 
71  /*Crc-32 calculaion with 0x04C11DB7 polynomial*/
73  {
74  fceSFR->IN0.CHECK.U = 0xFACECAFE;
75  fceSFR->IN0.LENGTH.U = 0xFACECAFE;
76  fceSFR->IN0.CHECK.U = fce->expectedCrc;
77  fceSFR->IN0.LENGTH.U = crcDataLength;
78  fceSFR->IN0.CRC.U = crcStartValue;
79 
80  inPtr = (volatile uint32 *)&fceSFR->IN0.IR.U;
81  }
82  else
83  {
84  fceSFR->IN1.CHECK.U = 0xFACECAFE;
85  fceSFR->IN1.LENGTH.U = 0xFACECAFE;
86  fceSFR->IN1.CHECK.U = fce->expectedCrc;
87  fceSFR->IN1.LENGTH.U = crcDataLength;
88  fceSFR->IN1.CRC.U = crcStartValue;
89 
90  inPtr = (volatile uint32 *)&fceSFR->IN1.IR.U;
91  }
92 
93  for (inputDataCounter = 0; inputDataCounter < crcDataLength; inputDataCounter++)
94  {
95  *inPtr = *(dataPtr++);
96  }
97 
99  {
100  crcResultValue = fceSFR->IN0.RES.U;
101  }
102  else
103  {
104  crcResultValue = fceSFR->IN1.RES.U;
105  }
106 
107  return crcResultValue;
108 }
109 
110 
111 uint8 IfxFce_Crc_calculateCrc8(IfxFce_Crc_Crc *fce, const uint8 *crcData, uint32 crcDataLength, uint8 crcStartValue)
112 {
113  Ifx_FCE *fceSFR = fce->fce;
114  uint32 inputDataCounter;
115  uint8 crcResultValue;
116  uint8 *dataPtr = (uint8 *)crcData;
117 
118  fceSFR->IN3.CHECK.U = 0xFACECAFE;
119  fceSFR->IN3.LENGTH.U = 0xFACECAFE;
120  fceSFR->IN3.CHECK.U = (uint8)fce->expectedCrc;
121  fceSFR->IN3.LENGTH.U = crcDataLength;
122 
123  /*Configure CRC register*/
124  fceSFR->IN3.CRC.U = crcStartValue;
125 
126  /*Code for CRC-8 calculaion for 0x1D polynomials*/
127 
128  /* input in INIT register */
129  for (inputDataCounter = 0; inputDataCounter < crcDataLength; ++inputDataCounter)
130  {
131  fceSFR->IN3.IR.U = *(dataPtr++);
132  }
133 
134  crcResultValue = fceSFR->IN3.RES.U;
135 
136  return crcResultValue;
137 }
138 
139 
141 {
142  if (fce->crcMode == IfxFce_CrcMode_8)
143  {
145  }
146  else if (fce->crcMode == IfxFce_CrcMode_16)
147  {
149  }
150  else
151  {
153  }
154 }
155 
156 
158 {
159  IfxFce_resetModule(fce->fce);
160 }
161 
162 
164 {
165  if (fce->crcMode == IfxFce_CrcMode_8)
166  {
167  return IfxFce_getCrc8InterruptStatus(fce->fce);
168  }
169  else if (fce->crcMode == IfxFce_CrcMode_16)
170  {
171  return IfxFce_getCrc16InterruptStatus(fce->fce);
172  }
173  else
174  {
176  }
177 }
178 
179 
181 {
182  fceCrc->fce = crcConfig->fce;
183  Ifx_FCE *fceSFR = crcConfig->fce;
184  fceCrc->crcMode = crcConfig->crcMode;
185  fceCrc->expectedCrc = crcConfig->expectedCrc;
186 
188  IfxScuWdt_clearCpuEndinit(password);
189 
190  Ifx_FCE_CFG tempCFG;
191  tempCFG.U = 0;
192  tempCFG.B.CMI = crcConfig->enabledInterrupts.crcMismatch;
193  tempCFG.B.CEI = crcConfig->enabledInterrupts.configError;
194  tempCFG.B.LEI = crcConfig->enabledInterrupts.lengthError;
195  tempCFG.B.BEI = crcConfig->enabledInterrupts.busError;
196  tempCFG.B.CCE = crcConfig->crcCheckCompared;
197  tempCFG.B.ALR = crcConfig->automaticLengthReload;
198  tempCFG.B.REFIN = crcConfig->dataByteReflectionEnabled;
199  tempCFG.B.REFOUT = crcConfig->crc32BitReflectionEnabled;
200  tempCFG.B.XSEL = crcConfig->crcResultInverted;
201 
202  if (crcConfig->crcMode == IfxFce_CrcMode_8)
203  {
204  fceSFR->IN3.CFG.U = tempCFG.U;
205  }
206  else if (crcConfig->crcMode == IfxFce_CrcMode_16)
207  {
208  fceSFR->IN2.CFG.U = tempCFG.U;
209  }
210  else
211  {
212  fceCrc->crc32Kernel = crcConfig->crc32Kernel;
213 
214  if (crcConfig->crc32Kernel == IfxFce_Crc32Kernel_0)
215  {
216  fceSFR->IN0.CFG.U = tempCFG.U;
217  }
218  else
219  {
220  fceSFR->IN1.CFG.U = tempCFG.U;
221  }
222  }
223 
224  IfxScuWdt_setCpuEndinit(password);
225 }
226 
227 
229 {
230  crcConfig->fce = fce->fce;
231  crcConfig->crcMode = IfxFce_CrcMode_32;
232  crcConfig->crcCheckCompared = TRUE;
233  crcConfig->automaticLengthReload = FALSE;
234  crcConfig->dataByteReflectionEnabled = TRUE;
235  crcConfig->crc32BitReflectionEnabled = TRUE;
236  crcConfig->crcResultInverted = TRUE;
237  crcConfig->enabledInterrupts.crcMismatch = FALSE; // enable if CRC is already known
238  crcConfig->enabledInterrupts.configError = TRUE;
239  crcConfig->enabledInterrupts.lengthError = TRUE;
240  crcConfig->enabledInterrupts.busError = TRUE;
241 }
242 
243 
245 {
246  fce->fce = config->fce;
247  Ifx_FCE *fceSFR = config->fce;
248 
250  IfxScuWdt_clearCpuEndinit(password);
251  IfxFce_enableModule(fceSFR);
252  IfxScuWdt_setCpuEndinit(password);
253 
254  volatile Ifx_SRC_SRCR *src = IfxFce_getSrcPointer(fceSFR);
255  IfxSrc_init(src, config->isrTypeOfService, config->isrPriority);
256  IfxSrc_enable(src);
257 }
258 
259 
261 {
262  config->fce = fce;
263  config->isrPriority = 0;
265 }