iLLD_TC27xC  1.0
IfxQspi_SpiSlave.h
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1 /**
2  * \file IfxQspi_SpiSlave.h
3  * \brief QSPI SPISLAVE details
4  * \ingroup IfxLld_Qspi
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Qspi_SpiSlave_Usage How to use the SPI Slave Interface driver?
25  * \ingroup IfxLld_Qspi
26  *
27  * The SPI Slave interface driver provides a default QSPI configuration for a bidirectional serial communication of data words.
28  *
29  * Data transactions are buffered by the hardware based FIFOs. Incoming and outgoing data is transfered in background from/to the QSPI peripheral by interrupt service handlers, which are part of this driver as well. This allows a nonblocking communication without stalling the thread(s) from where data is sent and received.
30  * Optionally Dma can be used for data transfers. Only the interrupt configuration and Module initialisation are different when dma is used.
31  *
32  * In the following sections it will be described, how to integrate the driver into the application framework.
33  *
34  * \section IfxLld_Qspi_SpiSlave_Preparation Preparation
35  * \subsection IfxLld_Qspi_SpiSlave_Include Include Files
36  *
37  * Include following header file into your C code:
38  * \code
39  * #include <Qspi/SpiSlave/IfxQspi_SpiSlave.h>
40  * \endcode
41  *
42  * \subsection IfxLld_Qspi_SpiSlave_Variables Variables
43  *
44  * Declare QSPI module handle:
45  *
46  * \code
47  * IfxQspi_SpiSlave spi;
48  * \endcode
49  *
50  * In addition, declare global transmit and receive buffers for the data transfers:
51  * \code
52  * #define SPI_BUFFER_SIZE 8
53  * uint8 spiTxBuffer[SPI_BUFFER_SIZE];
54  * uint8 spiRxBuffer[SPI_BUFFER_SIZE];
55  * \endcode
56  *
57  * \subsection IfxLld_Qspi_SpiSlave_Interrupt Interrupt Handler Installation (without dma use)
58  *
59  * See also \ref IfxLld_Cpu_Interrupt_Usage
60  *
61  * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
62  * \code
63  * // priorities are normally defined in Ifx_IntPrioDef.h
64  * \endcode
65  *
66  * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
67  * \code
68  * IFX_INTERRUPT(qspi2TxISR, 0, IFX_INTPRIO_QSPI2_TX)
69  * {
70  * IfxQspi_SpiSlave_isrTransmit(&spiSlave);
71  * }
72  *
73  * IFX_INTERRUPT(qspi2RxISR, 0, IFX_INTPRIO_QSPI2_RX)
74  * {
75  * IfxQspi_SpiSlave_isrReceive(&spiSlave);
76  * }
77  *
78  * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
79  * {
80  * IfxQspi_SpiSlave_isrError(&spiSlave);
81  * }
82  * \endcode
83  *
84  * Finally install the interrupt handlers in your initialisation function:
85  * \code
86  * // install interrupt handlers
87  * IfxCpu_Irq_installInterruptHandler(&qspi2TxISR, IFX_INTPRIO_QSPI2_TX);
88  * IfxCpu_Irq_installInterruptHandler(&qspi2RxISR, IFX_INTPRIO_QSPI2_RX);
89  * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
90  * IfxCpu_enableInterrupts();
91  * \endcode
92  *
93  * \subsection IfxLld_Qspi_SpiSlave_Interrupt_dma Interrupt Handler Installation (with dma use)
94  *
95  * See also \ref IfxLld_Cpu_Interrupt_Usage
96  *
97  * Define priorities for the Interrrupt handlers. This is normally done in the Ifx_IntPrioDef.h file:
98  * \code
99  * // priorities are normally defined in Ifx_IntPrioDef.h
100  * // qspi priorities
101  * #define IFX_INTPRIO_QSPI2_TX 3 // DMA channel 3
102  * #define IFX_INTPRIO_QSPI2_RX 4 // DMA channel 4
103  * #define IFX_INTPRIO_QSPI2_ER 0x31
104  * // dma priorities
105  * #define IFX_INTPRIO_DMA_CH3 12
106  * #define IFX_INTPRIO_DMA_CH4 13
107  * \endcode
108  *
109  * Add the interrupt service routines to your C code. They have to call the QSPI interrupt handlers by passing the spi handle:
110  * \code
111  * IFX_INTERRUPT(qspi2DmaTxISR, 0, IFX_INTPRIO_DMA_CH3)
112  * {
113  * IfxQspi_SpiSlave_isrDmaTransmit(&spiSlave);
114  *
115  * }
116  *
117  * IFX_INTERRUPT(qspi2DmaRxISR, 0, IFX_INTPRIO_DMA_CH4)
118  * {
119  * IfxQspi_SpiSlave_isrDmaReceive(&spiSlave);
120  * }
121  *
122  * IFX_INTERRUPT(qspi2ErISR, 0, IFX_INTPRIO_QSPI2_ER)
123  * {
124  * IfxQspi_SpiSlave_isrError(&spiSlave);
125  * }
126  * \endcode
127  *
128  * Finally install the interrupt handlers in your initialisation function:
129  * \code
130  * // install interrupt handlers
131  * IfxCpu_Irq_installInterruptHandler(&qspi2DmaTxISR, IFX_INTPRIO_DMA_CH3);
132  * IfxCpu_Irq_installInterruptHandler(&qspi2DmaRxISR, IFX_INTPRIO_DMA_CH4);
133  * IfxCpu_Irq_installInterruptHandler(&qspi2ErISR, IFX_INTPRIO_QSPI2_ER);
134  * IfxCpu_enableInterrupts();
135  * \endcode
136  *
137  * \subsection IfxLld_Qspi_SpiSlave_Init Module Initialisation (without dma use)
138  *
139  * The module initialisation can be done in the same function.
140  *
141  * Here an example for slave mode:
142  * \code
143  * // create module config
144  * IfxQspi_SpiSlave_Config spiSlaveConfig;
145  * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
146  *
147  * // set the maximum baudrate
148  * spiSlaveConfig.base.maximumBaudrate = 10000000;
149  *
150  * // ISR priorities and interrupt target
151  * spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
152  * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
153  * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
154  * spiSlaveConfig.base.isrProvider = (IfxSrc_Tos)IfxCpu_getCoreId();
155  *
156  * // pin configuration
157  * const IfxQspi_SpiSlave_Pins slavePins = {
158  * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
159  * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
160  * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
161  * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
162  * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
163  * };
164  * spiSlaveConfig.pins = &slavePins;
165  *
166  * // initialize module
167  * //IfxQspi_Spi spi; // defined globally
168  * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
169  * \endcode
170  *
171  * \subsection IfxLld_Qspi_SpiSlave_Init_dma Module Initialisation (with dma use)
172  *
173  * The module initialisation can be done in the same function.
174  *
175  * Here an example for slave mode:
176  * \code
177  * // create module config
178  * IfxQspi_SpiSlave_Config spiSlaveConfig;
179  * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
180  *
181  * // set the maximum baudrate
182  * spiSlaveConfig.base.maximumBaudrate = 10000000;
183  *
184  * // ISR priorities and interrupt target (with dma usage)
185  * spiSlaveConfig.base.txPriority = IFX_INTPRIO_DMA_CH3;
186  * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_DMA_CH4;
187  * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
188  *
189  * spiSlaveConfig.dma.txDmaChannelId = IfxDma_ChannelId_3;
190  * spiSlaveConfig.dma.rxDmaChannelId = IfxDma_ChannelId_4;
191  * spiSlaveConfig.dma.useDma = 1;
192  *
193  * // pin configuration
194  * const IfxQspi_SpiSlave_Pins slavePins = {
195  * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
196  * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
197  * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
198  * &IfxQspi2_SLSIA_P15_2_IN, IfxPort_InputMode_pullDown, // SLSI Pin
199  * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
200  * };
201  * spiSlaveConfig.pins = &slavePins;
202  *
203  * // initialize module
204  * //IfxQspi_Spi spi; // defined globally
205  * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
206  * \endcode
207  *
208  * The QSPI is ready for use now!
209  *
210  *
211  * \section IfxLld_Qspi_SpiSlave_DataTransfers Data Transfers
212  *
213  * In following examples we assume, that following buffers are declared globally:
214  * \code
215  * // declared somewhere globally
216  * #define SPI_BUFFER_SIZE 8
217  * uint8 spiTxBuffer[SPI_BUFFER_SIZE] = { 1, 2, 3, 4, 5, 6, 7, 8 };
218  * uint8 spiRxBuffer[SPI_BUFFER_SIZE] = { 0, 0, 0, 0, 0, 0, 0, 0 };
219  * \endcode
220  *
221  * Sending and Receiving a data stream:
222  * \code
223  * // wait until transfer of previous data stream is finished
224  * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
225  *
226  * // send/receive new stream
227  * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], SPI_BUFFER_SIZE);
228  * \endcode
229  *
230  * Send only, discard received data:
231  * \code
232  * // wait until transfer of previous data stream is finished
233  * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
234  *
235  * // send new stream
236  * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, SPI_BUFFER_SIZE);
237  * \endcode
238  *
239  * Receive only, send all-1
240  * \code
241  * // wait until transfer of previous data stream is finished
242  * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
243  *
244  * // receive new stream
245  * IfxQspi_SpiSlave_exchange(&spi, NULL_PTR, &spiRxBuffer[i], SPI_BUFFER_SIZE);
246  * \endcode
247  *
248  * \defgroup IfxLld_Qspi_SpiSlave SPI Slave Driver
249  * \ingroup IfxLld_Qspi
250  * \defgroup IfxLld_Qspi_SpiSlave_DataStructures Data Structures
251  * \ingroup IfxLld_Qspi_SpiSlave
252  * \defgroup IfxLld_Qspi_SpiSlave_Module Module Functions
253  * \ingroup IfxLld_Qspi_SpiSlave
254  * \defgroup IfxLld_Qspi_SpiSlave_Support Support Functions
255  * \ingroup IfxLld_Qspi_SpiSlave
256  * \defgroup IfxLld_Qspi_SpiSlave_Com Communication
257  * \ingroup IfxLld_Qspi_SpiSlave
258  * \defgroup IfxLld_Qspi_SpiSlave_InterruptFunctions Interrupt Functions
259  * \ingroup IfxLld_Qspi_SpiSlave
260  * \defgroup IfxLld_Qspi_SpiSlave_DirectFifo Direct FIFO Access
261  * \ingroup IfxLld_Qspi_SpiSlave
262  */
263 
264 #ifndef IFXQSPI_SPISLAVE_H
265 #define IFXQSPI_SPISLAVE_H 1
266 
267 /******************************************************************************/
268 /*----------------------------------Includes----------------------------------*/
269 /******************************************************************************/
270 
271 #include "Qspi/Std/IfxQspi.h"
272 #include "If/SpiIf.h"
273 #include "Dma/Dma/IfxDma_Dma.h"
274 
275 /******************************************************************************/
276 /*-----------------------------Data Structures--------------------------------*/
277 /******************************************************************************/
278 
279 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
280  * \{ */
281 /** \brief Dma handle
282  */
283 typedef struct
284 {
285  IfxDma_Dma_Channel rxDmaChannel; /**< \brief receive DMA channel handle */
286  IfxDma_Dma_Channel txDmaChannel; /**< \brief transmit DMA channel handle */
287  IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi recieve */
288  IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
289  boolean useDma; /**< \brief use Dma for Data transfers */
291 
292 /** \brief Dma configuration
293  */
294 typedef struct
295 {
296  IfxDma_ChannelId rxDmaChannelId; /**< \brief DMA channel no for the Spi receive */
297  IfxDma_ChannelId txDmaChannelId; /**< \brief DMA channel no for the Spi transmit */
298  boolean useDma; /**< \brief use Dma for Data transfers */
300 
301 /** \brief Slave pin IO configuration structure
302  */
303 typedef struct
304 {
305  const IfxQspi_Sclk_In *sclk; /**< \brief Pointer to SLCK in pin */
306  IfxPort_InputMode sclkMode; /**< \brief The SCLK pin input mode */
307  const IfxQspi_Mtsr_In *mtsr; /**< \brief Pointer to MTSR in pin */
308  IfxPort_InputMode mtsrMode; /**< \brief The MTSR pin input mode */
309  const IfxQspi_Mrst_Out *mrst; /**< \brief Pointer to MRST out pin */
310  IfxPort_OutputMode mrstMode; /**< \brief The MRST pin output mode */
311  const IfxQspi_Slsi_In *slsi; /**< \brief Pointer to SLSI in pin */
312  IfxPort_InputMode slsiMode; /**< \brief The SLSI pin input mode */
313  IfxPort_PadDriver pinDriver; /**< \brief The pad driver mode which should be configured */
315 
316 /** \brief Configures the SPI Protocol
317  */
318 typedef struct
319 {
320  SpiIf_ClockPolarity clockPolarity; /**< \brief Specifies the clock polarity */
321  SpiIf_ShiftClock shiftClock; /**< \brief Specifies the clock phase */
322  SpiIf_DataHeading dataHeading; /**< \brief Specifies MSB or LSB first */
323  uint8 dataWidth; /**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
324  Ifx_ParityMode parityMode; /**< \brief Specifies the parity mode */
326 
327 /** \} */
328 
329 /** \addtogroup IfxLld_Qspi_SpiSlave_DataStructures
330  * \{ */
331 /** \brief Module handle data structure
332  */
333 typedef struct
334 {
335  SpiIf base; /**< \brief Module SPI interface handle */
336  Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
337  uint8 dataWidth; /**< \brief Number of bits which will be written into the FIFO */
338  SpiIf_Job rxJob; /**< \brief Rx Stream which has been received */
339  SpiIf_Job txJob; /**< \brief Tx Stream which should be sent */
340  boolean onTransfer; /**< \brief set to TRUE during ongoing transfer */
341  IfxQspi_SpiSlave_Dma dma; /**< \brief Dma handle */
343 
344 /** \brief Module configuration structure
345  */
346 typedef struct
347 {
348  SpiIf_Config base; /**< \brief SPI interface configuration structure */
349  Ifx_QSPI *qspi; /**< \brief Pointer to QSPI module registers */
350  boolean allowSleepMode; /**< \brief Specifies module sleep mode */
351  boolean pauseOnBaudrateSpikeErrors; /**< \brief Specifies module pause on baudrate or spike errors */
352  IfxQspi_PauseRunTransition pauseRunTransition; /**< \brief Specifies module run or pause mode */
353  IfxQspi_TxFifoInt txFifoThreshold; /**< \brief Specifies the TXFIFO interrupt threshold */
354  IfxQspi_RxFifoInt rxFifoThreshold; /**< \brief Specifies the RXFIFO interrupt threshold */
355  const IfxQspi_SpiSlave_Pins *pins; /**< \brief structure for QSPI Slave pins */
357  IfxQspi_SpiSlave_DmaConfig dma; /**< \brief Dma configuration */
359 
360 /** \} */
361 
362 /** \addtogroup IfxLld_Qspi_SpiSlave_Module
363  * \{ */
364 
365 /******************************************************************************/
366 /*-------------------------Global Function Prototypes-------------------------*/
367 /******************************************************************************/
368 
369 /** \brief Initialises the module
370  * \param handle Module handle
371  * \param config Predefined configuration structure of the module
372  * \return None
373  *
374  * Configuration example for QSPI in slave mode:
375  * \code
376  * // create module config
377  * IfxQspi_SpiSlave_Config spiSlaveConfig;
378  * IfxQspi_SpiSlave_initModuleConfig(&spiSlaveConfig, &MODULE_QSPI2);
379  *
380  * // set the desired mode and maximum baudrate
381  * spiSlaveConfig.base.maximumBaudrate = 10000000;
382  *
383  * // ISR priorities and interrupt target
384  * spiSlaveConfig.base.txPriority = IFX_INTPRIO_QSPI2_TX;
385  * spiSlaveConfig.base.rxPriority = IFX_INTPRIO_QSPI2_RX;
386  * spiSlaveConfig.base.erPriority = IFX_INTPRIO_QSPI2_ER;
387  * spiSlaveConfig.base.isrProvider = (IfxSrc_Tos)IfxCpu_getCoreId();
388  *
389  * // pin configuration
390  * const IfxQspi_SpiSlave_SlavePins pins = {
391  * &IfxQspi2_SCLKA_P15_3_IN, IfxPort_InputMode_pullDown, // SCLK Pin
392  * &IfxQspi2_MTSRA_P15_5_IN, IfxPort_InputMode_pullDown, // MTSR Pin
393  * &IfxQspi2_MRST_P15_7_OUT, IfxPort_OutputMode_pushPull, // MRST Pin
394  * IfxPort_PadDriver_cmosAutomotiveSpeed3 // pad driver mode
395  * };
396  * spiSlaveConfig.pins = &slavePins;
397  *
398  * // initialize module
399  * //IfxQspi_SpiSlave spi; // defined globally
400  * IfxQspi_SpiSlave_initModule(&spi, &spiSlaveConfig);
401  * \endcode
402  *
403  */
405 
406 /** \brief Fills the config structure with default values
407  * \param config Configuration structure which should be initialized.
408  * \param qspi pointer to QSPI registers
409  * \return None
410  *
411  * Usage example: see \ref IfxQspi_SpiSlave_initModule
412  *
413  */
415 
416 /** \} */
417 
418 /** \addtogroup IfxLld_Qspi_SpiSlave_Com
419  * \{ */
420 
421 /******************************************************************************/
422 /*-------------------------Global Function Prototypes-------------------------*/
423 /******************************************************************************/
424 
425 /** \brief Exchanges data between source and data
426  * \param handle Module handle
427  * \param src Source of data. Can be set to NULL_PTR if nothing to receive (transmit only)
428  * \param dest Destination to which to be sent. Can be set to NULL_PTR if nothing to transmit (receive only) - in this case, all-1 will be sent.
429  * \param count Number of data in pending
430  * \return Status of exchange of data
431  *
432  * In following examples we assume, that following buffers are declared globally:
433  * \code
434  * // declared somewhere globally
435  * uint8 spiTxBuffer[8] = { 1, 2, 3, 4, 5, 6, 7, 8 };
436  * uint8 spiRxBuffer[8] = { 0, 0, 0, 0, 0, 0, 0, 0 };
437  * \endcode
438  *
439  * Sending and Receiving a data stream:
440  * \code
441  * // wait until transfer of previous data stream is finished
442  * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
443  *
444  * // send/receive new stream
445  * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], &spiRxBuffer[i], 8);
446  * \endcode
447  *
448  * Send only, discard received data:
449  * \code
450  * // wait until transfer of previous data stream is finished
451  * while( IfxQspi_SpiSlave_getStatus(&spi) == SpiIf_Status_busy );
452  *
453  * // send new stream
454  * IfxQspi_SpiSlave_exchange(&spi, &spiTxBuffer[i], NULL_PTR, 8);
455  * \endcode
456  *
457  * Receive only, send all-1
458  * \code
459  * // wait until transfer of previous data stream is finished
460  * while( IfxQspi_Spi_getStatus(&spi) == SpiIf_Status_busy );
461  *
462  * // receive new stream
463  * IfxQspi_Spi_exchange(&spi, NULL_PTR, &spiRxBuffer[i], 8);
464  * \endcode
465  *
466  * The handling of slave transfers is identical.
467  *
468  */
469 IFX_EXTERN SpiIf_Status IfxQspi_SpiSlave_exchange(IfxQspi_SpiSlave *handle, const void *src, void *dest, Ifx_SizeT count);
470 
471 /** \brief Gets the transmission status
472  * \param handle Module handle
473  * \return Transmission status
474  *
475  * Usage example: see \ref IfxQspi_SpiSlave_exchange
476  *
477  */
479 
480 /** \} */
481 
482 /** \addtogroup IfxLld_Qspi_SpiSlave_InterruptFunctions
483  * \{ */
484 
485 /******************************************************************************/
486 /*-------------------------Global Function Prototypes-------------------------*/
487 /******************************************************************************/
488 
489 /** \brief Dma receive interrupt handler
490  * \param qspiHandle Module handle
491  * \return None
492  */
494 
495 /** \brief Transmit interrupt handler
496  * \param qspiHandle Module handle
497  * \return None
498  */
500 
501 /** \brief Error Interrupt handler
502  * \param handle Module handle
503  * \return None
504  */
506 
507 /** \brief Receive Interrupt handler
508  * \param handle Module handle
509  * \return None
510  */
512 
513 /** \brief Transmit interrupt handler
514  * \param handle Module handle
515  * \return None
516  */
518 
519 /** \} */
520 
521 /** \addtogroup IfxLld_Qspi_SpiSlave_DirectFifo
522  * \{ */
523 
524 /******************************************************************************/
525 /*-------------------------Inline Function Prototypes-------------------------*/
526 /******************************************************************************/
527 
528 /** \brief Reads data or status in RxFIFO
529  * \param handle QSpi Slave handle
530  * \return Data or Status in RxFIFO
531  */
533 
534 /** \brief Writes the data to TxFIFO
535  * \param handle QSpi slave handle
536  * \param data Data to be entered in Tx FIFO
537  * \return None
538  */
540 
541 /** \} */
542 
543 /******************************************************************************/
544 /*---------------------Inline Function Implementations------------------------*/
545 /******************************************************************************/
546 
548 {
549  Ifx_QSPI *qspiSFR = handle->qspi;
550  uint32 data = IfxQspi_readReceiveFifo(qspiSFR);
551  return data;
552 }
553 
554 
556 {
558 }
559 
560 
561 #endif /* IFXQSPI_SPISLAVE_H */