iLLD_TC27xC  1.0
IfxQspi_PinMap.c
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1 /**
2  * \file IfxQspi_PinMap.c
3  * \brief QSPI I/O map
4  * \ingroup IfxLld_Qspi
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  */
25 
26 #include "IfxQspi_PinMap.h"
27 
28 IfxQspi_Mrst_In IfxQspi0_MRSTA_P20_12_IN = {&MODULE_QSPI0, {&MODULE_P20,12}, Ifx_RxSel_a};
29 IfxQspi_Mrst_In IfxQspi0_MRSTB_P22_9_IN = {&MODULE_QSPI0, {&MODULE_P22, 9}, Ifx_RxSel_b};
30 IfxQspi_Mrst_In IfxQspi0_MRSTC_P22_6_IN = {&MODULE_QSPI0, {&MODULE_P22, 6}, Ifx_RxSel_c};
31 IfxQspi_Mrst_In IfxQspi1_MRSTA_P10_1_IN = {&MODULE_QSPI1, {&MODULE_P10, 1}, Ifx_RxSel_a};
32 IfxQspi_Mrst_In IfxQspi1_MRSTB_P11_3_IN = {&MODULE_QSPI1, {&MODULE_P11, 3}, Ifx_RxSel_b};
33 IfxQspi_Mrst_In IfxQspi2_MRSTA_P15_4_IN = {&MODULE_QSPI2, {&MODULE_P15, 4}, Ifx_RxSel_a};
34 IfxQspi_Mrst_In IfxQspi2_MRSTB_P15_7_IN = {&MODULE_QSPI2, {&MODULE_P15, 7}, Ifx_RxSel_b};
35 IfxQspi_Mrst_In IfxQspi2_MRSTCN_P21_2_IN = {&MODULE_QSPI2, {&MODULE_P21, 2}, Ifx_RxSel_c};
36 IfxQspi_Mrst_In IfxQspi2_MRSTCP_P21_3_IN = {&MODULE_QSPI2, {&MODULE_P21, 3}, Ifx_RxSel_c};
37 IfxQspi_Mrst_In IfxQspi2_MRSTD_P34_4_IN = {&MODULE_QSPI2, {&MODULE_P34, 4}, Ifx_RxSel_d};
38 IfxQspi_Mrst_In IfxQspi2_MRSTE_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_e};
39 IfxQspi_Mrst_In IfxQspi3_MRSTA_P02_5_IN = {&MODULE_QSPI3, {&MODULE_P02, 5}, Ifx_RxSel_a};
40 IfxQspi_Mrst_In IfxQspi3_MRSTB_P10_7_IN = {&MODULE_QSPI3, {&MODULE_P10, 7}, Ifx_RxSel_b};
41 IfxQspi_Mrst_In IfxQspi3_MRSTC_P01_5_IN = {&MODULE_QSPI3, {&MODULE_P01, 5}, Ifx_RxSel_c};
42 IfxQspi_Mrst_In IfxQspi3_MRSTD_P33_13_IN = {&MODULE_QSPI3, {&MODULE_P33,13}, Ifx_RxSel_d};
43 IfxQspi_Mrst_In IfxQspi3_MRSTE_P22_1_IN = {&MODULE_QSPI3, {&MODULE_P22, 1}, Ifx_RxSel_e};
44 IfxQspi_Mrst_In IfxQspi3_MRSTFN_P21_2_IN = {&MODULE_QSPI3, {&MODULE_P21, 2}, Ifx_RxSel_f};
45 IfxQspi_Mrst_In IfxQspi3_MRSTFP_P21_3_IN = {&MODULE_QSPI3, {&MODULE_P21, 3}, Ifx_RxSel_f};
60 IfxQspi_Mtsr_In IfxQspi0_MTSRA_P20_14_IN = {&MODULE_QSPI0, {&MODULE_P20,14}, Ifx_RxSel_a};
61 IfxQspi_Mtsr_In IfxQspi0_MTSRB_P22_10_IN = {&MODULE_QSPI0, {&MODULE_P22,10}, Ifx_RxSel_b};
62 IfxQspi_Mtsr_In IfxQspi0_MTSRC_P22_5_IN = {&MODULE_QSPI0, {&MODULE_P22, 5}, Ifx_RxSel_c};
63 IfxQspi_Mtsr_In IfxQspi1_MTSRA_P10_3_IN = {&MODULE_QSPI1, {&MODULE_P10, 3}, Ifx_RxSel_a};
64 IfxQspi_Mtsr_In IfxQspi1_MTSRB_P11_9_IN = {&MODULE_QSPI1, {&MODULE_P11, 9}, Ifx_RxSel_b};
65 IfxQspi_Mtsr_In IfxQspi1_MTSRC_P10_4_IN = {&MODULE_QSPI1, {&MODULE_P10, 4}, Ifx_RxSel_c};
66 IfxQspi_Mtsr_In IfxQspi2_MTSRA_P15_5_IN = {&MODULE_QSPI2, {&MODULE_P15, 5}, Ifx_RxSel_a};
67 IfxQspi_Mtsr_In IfxQspi2_MTSRB_P15_6_IN = {&MODULE_QSPI2, {&MODULE_P15, 6}, Ifx_RxSel_b};
68 IfxQspi_Mtsr_In IfxQspi2_MTSRD_P34_5_IN = {&MODULE_QSPI2, {&MODULE_P34, 5}, Ifx_RxSel_d};
69 IfxQspi_Mtsr_In IfxQspi3_MTSRA_P02_6_IN = {&MODULE_QSPI3, {&MODULE_P02, 6}, Ifx_RxSel_a};
70 IfxQspi_Mtsr_In IfxQspi3_MTSRB_P10_6_IN = {&MODULE_QSPI3, {&MODULE_P10, 6}, Ifx_RxSel_b};
71 IfxQspi_Mtsr_In IfxQspi3_MTSRC_P01_6_IN = {&MODULE_QSPI3, {&MODULE_P01, 6}, Ifx_RxSel_c};
72 IfxQspi_Mtsr_In IfxQspi3_MTSRD_P33_12_IN = {&MODULE_QSPI3, {&MODULE_P33,12}, Ifx_RxSel_d};
73 IfxQspi_Mtsr_In IfxQspi3_MTSRE_P22_0_IN = {&MODULE_QSPI3, {&MODULE_P22, 0}, Ifx_RxSel_e};
94 IfxQspi_Sclk_In IfxQspi0_SCLKA_P20_11_IN = {&MODULE_QSPI0, {&MODULE_P20,11}, Ifx_RxSel_a};
95 IfxQspi_Sclk_In IfxQspi0_SCLKB_P22_8_IN = {&MODULE_QSPI0, {&MODULE_P22, 8}, Ifx_RxSel_b};
96 IfxQspi_Sclk_In IfxQspi0_SCLKC_P22_7_IN = {&MODULE_QSPI0, {&MODULE_P22, 7}, Ifx_RxSel_c};
97 IfxQspi_Sclk_In IfxQspi1_SCLKA_P10_2_IN = {&MODULE_QSPI1, {&MODULE_P10, 2}, Ifx_RxSel_a};
98 IfxQspi_Sclk_In IfxQspi1_SCLKB_P11_6_IN = {&MODULE_QSPI1, {&MODULE_P11, 6}, Ifx_RxSel_b};
99 IfxQspi_Sclk_In IfxQspi2_SCLKA_P15_3_IN = {&MODULE_QSPI2, {&MODULE_P15, 3}, Ifx_RxSel_a};
100 IfxQspi_Sclk_In IfxQspi2_SCLKB_P15_8_IN = {&MODULE_QSPI2, {&MODULE_P15, 8}, Ifx_RxSel_b};
101 IfxQspi_Sclk_In IfxQspi2_SCLKD_P33_14_IN = {&MODULE_QSPI2, {&MODULE_P33,14}, Ifx_RxSel_d};
102 IfxQspi_Sclk_In IfxQspi3_SCLKA_P02_7_IN = {&MODULE_QSPI3, {&MODULE_P02, 7}, Ifx_RxSel_a};
103 IfxQspi_Sclk_In IfxQspi3_SCLKB_P10_8_IN = {&MODULE_QSPI3, {&MODULE_P10, 8}, Ifx_RxSel_b};
104 IfxQspi_Sclk_In IfxQspi3_SCLKC_P01_7_IN = {&MODULE_QSPI3, {&MODULE_P01, 7}, Ifx_RxSel_c};
105 IfxQspi_Sclk_In IfxQspi3_SCLKD_P33_11_IN = {&MODULE_QSPI3, {&MODULE_P33,11}, Ifx_RxSel_d};
106 IfxQspi_Sclk_In IfxQspi3_SCLKE_P22_3_IN = {&MODULE_QSPI3, {&MODULE_P22, 3}, Ifx_RxSel_e};
126 IfxQspi_Slsi_In IfxQspi0_SLSIA_P20_13_IN = {&MODULE_QSPI0, {&MODULE_P20,13}, Ifx_RxSel_a};
127 IfxQspi_Slsi_In IfxQspi0_SLSIB_P20_9_IN = {&MODULE_QSPI0, {&MODULE_P20, 9}, Ifx_RxSel_b};
128 IfxQspi_Slsi_In IfxQspi1_SLSIA_P11_10_IN = {&MODULE_QSPI1, {&MODULE_P11,10}, Ifx_RxSel_a};
129 IfxQspi_Slsi_In IfxQspi2_SLSIA_P15_2_IN = {&MODULE_QSPI2, {&MODULE_P15, 2}, Ifx_RxSel_a};
130 IfxQspi_Slsi_In IfxQspi2_SLSIB_P15_1_IN = {&MODULE_QSPI2, {&MODULE_P15, 1}, Ifx_RxSel_b};
131 IfxQspi_Slsi_In IfxQspi3_SLSIA_P02_4_IN = {&MODULE_QSPI3, {&MODULE_P02, 4}, Ifx_RxSel_a};
132 IfxQspi_Slsi_In IfxQspi3_SLSIB_P01_3_IN = {&MODULE_QSPI3, {&MODULE_P01, 3}, Ifx_RxSel_b};
133 IfxQspi_Slsi_In IfxQspi3_SLSIC_P33_10_IN = {&MODULE_QSPI3, {&MODULE_P33,10}, Ifx_RxSel_c};
134 IfxQspi_Slsi_In IfxQspi3_SLSID_P22_2_IN = {&MODULE_QSPI3, {&MODULE_P22, 2}, Ifx_RxSel_d};
135 IfxQspi_Slso_Out IfxQspi0_SLSO0_P20_8_OUT = {&MODULE_QSPI0, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt3};
136 IfxQspi_Slso_Out IfxQspi0_SLSO10_P22_11_OUT = {&MODULE_QSPI0, 10, {&MODULE_P22,11}, IfxPort_OutputIdx_alt4};
137 IfxQspi_Slso_Out IfxQspi0_SLSO11_P23_6_OUT = {&MODULE_QSPI0, 11, {&MODULE_P23, 6}, IfxPort_OutputIdx_alt4};
138 IfxQspi_Slso_Out IfxQspi0_SLSO12_P22_4_OUT = {&MODULE_QSPI0, 12, {&MODULE_P22, 4}, IfxPort_OutputIdx_alt4};
139 IfxQspi_Slso_Out IfxQspi0_SLSO13_P15_0_OUT = {&MODULE_QSPI0, 13, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt3};
140 IfxQspi_Slso_Out IfxQspi0_SLSO1_P20_9_OUT = {&MODULE_QSPI0, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt3};
141 IfxQspi_Slso_Out IfxQspi0_SLSO2_P20_13_OUT = {&MODULE_QSPI0, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt3};
142 IfxQspi_Slso_Out IfxQspi0_SLSO3_P11_10_OUT = {&MODULE_QSPI0, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt3};
143 IfxQspi_Slso_Out IfxQspi0_SLSO4_P11_11_OUT = {&MODULE_QSPI0, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt3};
144 IfxQspi_Slso_Out IfxQspi0_SLSO5_P11_2_OUT = {&MODULE_QSPI0, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt3};
145 IfxQspi_Slso_Out IfxQspi0_SLSO6_P20_10_OUT = {&MODULE_QSPI0, 6, {&MODULE_P20,10}, IfxPort_OutputIdx_alt3};
146 IfxQspi_Slso_Out IfxQspi0_SLSO7_P33_5_OUT = {&MODULE_QSPI0, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt2};
147 IfxQspi_Slso_Out IfxQspi0_SLSO8_P20_6_OUT = {&MODULE_QSPI0, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt3};
148 IfxQspi_Slso_Out IfxQspi0_SLSO9_P20_3_OUT = {&MODULE_QSPI0, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt3};
149 IfxQspi_Slso_Out IfxQspi1_SLSO0_P20_8_OUT = {&MODULE_QSPI1, 0, {&MODULE_P20, 8}, IfxPort_OutputIdx_alt4};
150 IfxQspi_Slso_Out IfxQspi1_SLSO10_P10_0_OUT = {&MODULE_QSPI1, 10, {&MODULE_P10, 0}, IfxPort_OutputIdx_alt3};
151 IfxQspi_Slso_Out IfxQspi1_SLSO1_P20_9_OUT = {&MODULE_QSPI1, 1, {&MODULE_P20, 9}, IfxPort_OutputIdx_alt4};
152 IfxQspi_Slso_Out IfxQspi1_SLSO2_P20_13_OUT = {&MODULE_QSPI1, 2, {&MODULE_P20,13}, IfxPort_OutputIdx_alt4};
153 IfxQspi_Slso_Out IfxQspi1_SLSO3_P11_10_OUT = {&MODULE_QSPI1, 3, {&MODULE_P11,10}, IfxPort_OutputIdx_alt4};
154 IfxQspi_Slso_Out IfxQspi1_SLSO4_P11_11_OUT = {&MODULE_QSPI1, 4, {&MODULE_P11,11}, IfxPort_OutputIdx_alt4};
155 IfxQspi_Slso_Out IfxQspi1_SLSO5_P11_2_OUT = {&MODULE_QSPI1, 5, {&MODULE_P11, 2}, IfxPort_OutputIdx_alt4};
156 IfxQspi_Slso_Out IfxQspi1_SLSO6_P33_10_OUT = {&MODULE_QSPI1, 6, {&MODULE_P33,10}, IfxPort_OutputIdx_alt2};
157 IfxQspi_Slso_Out IfxQspi1_SLSO7_P33_5_OUT = {&MODULE_QSPI1, 7, {&MODULE_P33, 5}, IfxPort_OutputIdx_alt3};
158 IfxQspi_Slso_Out IfxQspi1_SLSO8_P10_4_OUT = {&MODULE_QSPI1, 8, {&MODULE_P10, 4}, IfxPort_OutputIdx_alt3};
159 IfxQspi_Slso_Out IfxQspi1_SLSO9_P10_5_OUT = {&MODULE_QSPI1, 9, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt4};
160 IfxQspi_Slso_Out IfxQspi2_SLSO0_P15_2_OUT = {&MODULE_QSPI2, 0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt3};
161 IfxQspi_Slso_Out IfxQspi2_SLSO10_P34_3_OUT = {&MODULE_QSPI2, 10, {&MODULE_P34, 3}, IfxPort_OutputIdx_alt4};
162 IfxQspi_Slso_Out IfxQspi2_SLSO11_P33_15_OUT = {&MODULE_QSPI2, 11, {&MODULE_P33,15}, IfxPort_OutputIdx_alt3};
163 IfxQspi_Slso_Out IfxQspi2_SLSO12_P32_6_OUT = {&MODULE_QSPI2, 12, {&MODULE_P32, 6}, IfxPort_OutputIdx_alt4};
164 IfxQspi_Slso_Out IfxQspi2_SLSO1_P14_2_OUT = {&MODULE_QSPI2, 1, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt3};
165 IfxQspi_Slso_Out IfxQspi2_SLSO2_P14_6_OUT = {&MODULE_QSPI2, 2, {&MODULE_P14, 6}, IfxPort_OutputIdx_alt3};
166 IfxQspi_Slso_Out IfxQspi2_SLSO3_P14_3_OUT = {&MODULE_QSPI2, 3, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt3};
167 IfxQspi_Slso_Out IfxQspi2_SLSO4_P14_7_OUT = {&MODULE_QSPI2, 4, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt3};
168 IfxQspi_Slso_Out IfxQspi2_SLSO5_P15_1_OUT = {&MODULE_QSPI2, 5, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt3};
169 IfxQspi_Slso_Out IfxQspi2_SLSO6_P33_13_OUT = {&MODULE_QSPI2, 6, {&MODULE_P33,13}, IfxPort_OutputIdx_alt4};
170 IfxQspi_Slso_Out IfxQspi2_SLSO7_P20_10_OUT = {&MODULE_QSPI2, 7, {&MODULE_P20,10}, IfxPort_OutputIdx_alt4};
171 IfxQspi_Slso_Out IfxQspi2_SLSO8_P20_6_OUT = {&MODULE_QSPI2, 8, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt4};
172 IfxQspi_Slso_Out IfxQspi2_SLSO9_P20_3_OUT = {&MODULE_QSPI2, 9, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt4};
173 IfxQspi_Slso_Out IfxQspi3_SLSO0_P02_4_OUT = {&MODULE_QSPI3, 0, {&MODULE_P02, 4}, IfxPort_OutputIdx_alt3};
174 IfxQspi_Slso_Out IfxQspi3_SLSO10_P01_4_OUT = {&MODULE_QSPI3, 10, {&MODULE_P01, 4}, IfxPort_OutputIdx_alt4};
175 IfxQspi_Slso_Out IfxQspi3_SLSO11_P33_10_OUT = {&MODULE_QSPI3, 11, {&MODULE_P33,10}, IfxPort_OutputIdx_alt3};
176 IfxQspi_Slso_Out IfxQspi3_SLSO12_P22_2_OUT = {&MODULE_QSPI3, 12, {&MODULE_P22, 2}, IfxPort_OutputIdx_alt3};
177 IfxQspi_Slso_Out IfxQspi3_SLSO13_P23_1_OUT = {&MODULE_QSPI3, 13, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt3};
178 IfxQspi_Slso_Out IfxQspi3_SLSO1_P02_0_OUT = {&MODULE_QSPI3, 1, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt3};
179 IfxQspi_Slso_Out IfxQspi3_SLSO1_P33_9_OUT = {&MODULE_QSPI3, 1, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt3};
180 IfxQspi_Slso_Out IfxQspi3_SLSO2_P02_1_OUT = {&MODULE_QSPI3, 2, {&MODULE_P02, 1}, IfxPort_OutputIdx_alt3};
181 IfxQspi_Slso_Out IfxQspi3_SLSO2_P33_8_OUT = {&MODULE_QSPI3, 2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt3};
182 IfxQspi_Slso_Out IfxQspi3_SLSO3_P02_2_OUT = {&MODULE_QSPI3, 3, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt3};
183 IfxQspi_Slso_Out IfxQspi3_SLSO4_P02_3_OUT = {&MODULE_QSPI3, 4, {&MODULE_P02, 3}, IfxPort_OutputIdx_alt3};
184 IfxQspi_Slso_Out IfxQspi3_SLSO4_P23_5_OUT = {&MODULE_QSPI3, 4, {&MODULE_P23, 5}, IfxPort_OutputIdx_alt3};
185 IfxQspi_Slso_Out IfxQspi3_SLSO5_P02_8_OUT = {&MODULE_QSPI3, 5, {&MODULE_P02, 8}, IfxPort_OutputIdx_alt2};
186 IfxQspi_Slso_Out IfxQspi3_SLSO5_P23_4_OUT = {&MODULE_QSPI3, 5, {&MODULE_P23, 4}, IfxPort_OutputIdx_alt3};
187 IfxQspi_Slso_Out IfxQspi3_SLSO6_P00_8_OUT = {&MODULE_QSPI3, 6, {&MODULE_P00, 8}, IfxPort_OutputIdx_alt2};
188 IfxQspi_Slso_Out IfxQspi3_SLSO7_P00_9_OUT = {&MODULE_QSPI3, 7, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt2};
189 IfxQspi_Slso_Out IfxQspi3_SLSO7_P33_7_OUT = {&MODULE_QSPI3, 7, {&MODULE_P33, 7}, IfxPort_OutputIdx_alt3};
190 IfxQspi_Slso_Out IfxQspi3_SLSO8_P10_5_OUT = {&MODULE_QSPI3, 8, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt3};
191 IfxQspi_Slso_Out IfxQspi3_SLSO9_P01_3_OUT = {&MODULE_QSPI3, 9, {&MODULE_P01, 3}, IfxPort_OutputIdx_alt4};
192 
193 
195  {
199  NULL_PTR,
200  NULL_PTR,
201  NULL_PTR
202  },
203  {
206  NULL_PTR,
207  NULL_PTR,
208  NULL_PTR,
209  NULL_PTR
210  },
211  {
217  NULL_PTR
218  },
219  {
225  &IfxQspi3_MRSTFN_P21_2_IN
226  }
227 };
228 
230  {
234  NULL_PTR,
235  NULL_PTR
236  },
237  {
241  NULL_PTR,
242  NULL_PTR
243  },
244  {
248  NULL_PTR,
249  NULL_PTR
250  },
251  {
256  &IfxQspi3_MRST_P33_13_OUT
257  }
258 };
259 
261  {
265  NULL_PTR,
266  NULL_PTR
267  },
268  {
272  NULL_PTR,
273  NULL_PTR
274  },
275  {
278  NULL_PTR,
280  NULL_PTR
281  },
282  {
287  &IfxQspi3_MTSRE_P22_0_IN
288  }
289 };
290 
292  {
297  NULL_PTR,
298  NULL_PTR,
299  NULL_PTR
300  },
301  {
306  NULL_PTR,
307  NULL_PTR,
308  NULL_PTR
309  },
310  {
316  NULL_PTR,
317  NULL_PTR
318  },
319  {
326  &IfxQspi3_MTSR_P33_12_OUT
327  }
328 };
329 
331  {
335  NULL_PTR,
336  NULL_PTR
337  },
338  {
341  NULL_PTR,
342  NULL_PTR,
343  NULL_PTR
344  },
345  {
348  NULL_PTR,
350  NULL_PTR
351  },
352  {
357  &IfxQspi3_SCLKE_P22_3_IN
358  }
359 };
360 
362  {
367  NULL_PTR,
368  NULL_PTR,
369  NULL_PTR
370  },
371  {
374  NULL_PTR,
375  NULL_PTR,
376  NULL_PTR,
377  NULL_PTR,
378  NULL_PTR
379  },
380  {
387  NULL_PTR
388  },
389  {
396  &IfxQspi3_SCLK_P33_11_OUT
397  }
398 };
399 
401  {
404  NULL_PTR,
405  NULL_PTR
406  },
407  {
409  NULL_PTR,
410  NULL_PTR,
411  NULL_PTR
412  },
413  {
416  NULL_PTR,
417  NULL_PTR
418  },
419  {
423  &IfxQspi3_SLSID_P22_2_IN
424  }
425 };
426 
428  {
429  {
431  NULL_PTR
432  },
433  {
435  NULL_PTR
436  },
437  {
439  NULL_PTR
440  },
441  {
443  NULL_PTR
444  },
445  {
447  NULL_PTR
448  },
449  {
451  NULL_PTR
452  },
453  {
455  NULL_PTR
456  },
457  {
459  NULL_PTR
460  },
461  {
463  NULL_PTR
464  },
465  {
467  NULL_PTR
468  },
469  {
471  NULL_PTR
472  },
473  {
475  NULL_PTR
476  },
477  {
479  NULL_PTR
480  },
481  {
483  NULL_PTR
484  }
485  },
486  {
487  {
489  NULL_PTR
490  },
491  {
493  NULL_PTR
494  },
495  {
497  NULL_PTR
498  },
499  {
501  NULL_PTR
502  },
503  {
505  NULL_PTR
506  },
507  {
509  NULL_PTR
510  },
511  {
513  NULL_PTR
514  },
515  {
517  NULL_PTR
518  },
519  {
521  NULL_PTR
522  },
523  {
525  NULL_PTR
526  },
527  {
529  NULL_PTR
530  },
531  {
532  NULL_PTR,
533  NULL_PTR
534  },
535  {
536  NULL_PTR,
537  NULL_PTR
538  },
539  {
540  NULL_PTR,
541  NULL_PTR
542  }
543  },
544  {
545  {
547  NULL_PTR
548  },
549  {
551  NULL_PTR
552  },
553  {
555  NULL_PTR
556  },
557  {
559  NULL_PTR
560  },
561  {
563  NULL_PTR
564  },
565  {
567  NULL_PTR
568  },
569  {
571  NULL_PTR
572  },
573  {
575  NULL_PTR
576  },
577  {
579  NULL_PTR
580  },
581  {
583  NULL_PTR
584  },
585  {
587  NULL_PTR
588  },
589  {
591  NULL_PTR
592  },
593  {
595  NULL_PTR
596  },
597  {
598  NULL_PTR,
599  NULL_PTR
600  }
601  },
602  {
603  {
605  NULL_PTR
606  },
607  {
609  &IfxQspi3_SLSO1_P33_9_OUT
610  },
611  {
613  &IfxQspi3_SLSO2_P33_8_OUT
614  },
615  {
617  NULL_PTR
618  },
619  {
621  &IfxQspi3_SLSO4_P23_5_OUT
622  },
623  {
625  &IfxQspi3_SLSO5_P23_4_OUT
626  },
627  {
629  NULL_PTR
630  },
631  {
633  &IfxQspi3_SLSO7_P33_7_OUT
634  },
635  {
637  NULL_PTR
638  },
639  {
641  NULL_PTR
642  },
643  {
645  NULL_PTR
646  },
647  {
649  NULL_PTR
650  },
651  {
653  NULL_PTR
654  },
655  {
657  NULL_PTR
658  }
659  }
660 };