iLLD_TC27xC  1.0
IfxAsclin_PinMap.c
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1 /**
2  * \file IfxAsclin_PinMap.c
3  * \brief ASCLIN I/O map
4  * \ingroup IfxLld_Asclin
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  */
25 
26 #include "IfxAsclin_PinMap.h"
27 
28 IfxAsclin_Cts_In IfxAsclin0_CTSA_P14_9_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 9}, Ifx_RxSel_a};
29 IfxAsclin_Cts_In IfxAsclin1_CTSA_P20_7_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 7}, Ifx_RxSel_a};
30 IfxAsclin_Cts_In IfxAsclin1_CTSB_P32_4_IN = {&MODULE_ASCLIN1, {&MODULE_P32, 4}, Ifx_RxSel_b};
31 IfxAsclin_Cts_In IfxAsclin2_CTSA_P10_7_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 7}, Ifx_RxSel_a};
32 IfxAsclin_Cts_In IfxAsclin2_CTSB_P33_5_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 5}, Ifx_RxSel_b};
33 IfxAsclin_Cts_In IfxAsclin3_CTSA_P00_12_IN = {&MODULE_ASCLIN3, {&MODULE_P00,12}, Ifx_RxSel_a};
34 IfxAsclin_Rts_Out IfxAsclin0_RTS_P14_7_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 7}, IfxPort_OutputIdx_alt2};
35 IfxAsclin_Rts_Out IfxAsclin1_RTS_P20_6_OUT = {&MODULE_ASCLIN1, {&MODULE_P20, 6}, IfxPort_OutputIdx_alt2};
36 IfxAsclin_Rts_Out IfxAsclin1_RTS_P23_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P23, 1}, IfxPort_OutputIdx_alt2};
37 IfxAsclin_Rts_Out IfxAsclin2_RTS_P10_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 8}, IfxPort_OutputIdx_alt2};
38 IfxAsclin_Rts_Out IfxAsclin2_RTS_P33_4_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 4}, IfxPort_OutputIdx_alt2};
39 IfxAsclin_Rts_Out IfxAsclin3_RTS_P00_9_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 9}, IfxPort_OutputIdx_alt3};
40 IfxAsclin_Rx_In IfxAsclin0_RXA_P14_1_IN = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, Ifx_RxSel_a};
41 IfxAsclin_Rx_In IfxAsclin0_RXB_P15_3_IN = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, Ifx_RxSel_b};
42 IfxAsclin_Rx_In IfxAsclin0_RXD_P34_2_IN = {&MODULE_ASCLIN0, {&MODULE_P34, 2}, Ifx_RxSel_d};
43 IfxAsclin_Rx_In IfxAsclin1_RXA_P15_1_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, Ifx_RxSel_a};
44 IfxAsclin_Rx_In IfxAsclin1_RXB_P15_5_IN = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, Ifx_RxSel_b};
45 IfxAsclin_Rx_In IfxAsclin1_RXC_P20_9_IN = {&MODULE_ASCLIN1, {&MODULE_P20, 9}, Ifx_RxSel_c};
46 IfxAsclin_Rx_In IfxAsclin1_RXD_P14_8_IN = {&MODULE_ASCLIN1, {&MODULE_P14, 8}, Ifx_RxSel_d};
47 IfxAsclin_Rx_In IfxAsclin1_RXE_P11_10_IN = {&MODULE_ASCLIN1, {&MODULE_P11,10}, Ifx_RxSel_e};
48 IfxAsclin_Rx_In IfxAsclin1_RXF_P33_13_IN = {&MODULE_ASCLIN1, {&MODULE_P33,13}, Ifx_RxSel_f};
49 IfxAsclin_Rx_In IfxAsclin1_RXG_P02_3_IN = {&MODULE_ASCLIN1, {&MODULE_P02, 3}, Ifx_RxSel_g};
50 IfxAsclin_Rx_In IfxAsclin2_RXA_P14_3_IN = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, Ifx_RxSel_a};
51 IfxAsclin_Rx_In IfxAsclin2_RXB_P02_1_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 1}, Ifx_RxSel_b};
52 IfxAsclin_Rx_In IfxAsclin2_RXC_P02_10_IN = {&MODULE_ASCLIN2, {&MODULE_P02,10}, Ifx_RxSel_c};
53 IfxAsclin_Rx_In IfxAsclin2_RXD_P10_6_IN = {&MODULE_ASCLIN2, {&MODULE_P10, 6}, Ifx_RxSel_d};
54 IfxAsclin_Rx_In IfxAsclin2_RXE_P33_8_IN = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, Ifx_RxSel_e};
55 IfxAsclin_Rx_In IfxAsclin2_RXF_P32_6_IN = {&MODULE_ASCLIN2, {&MODULE_P32, 6}, Ifx_RxSel_f};
56 IfxAsclin_Rx_In IfxAsclin2_RXG_P02_0_IN = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, Ifx_RxSel_g};
57 IfxAsclin_Rx_In IfxAsclin3_RXA_P15_7_IN = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, Ifx_RxSel_a};
58 IfxAsclin_Rx_In IfxAsclin3_RXB_P11_0_IN = {&MODULE_ASCLIN3, {&MODULE_P11, 0}, Ifx_RxSel_b};
59 IfxAsclin_Rx_In IfxAsclin3_RXC_P20_3_IN = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, Ifx_RxSel_c};
60 IfxAsclin_Rx_In IfxAsclin3_RXD_P32_2_IN = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, Ifx_RxSel_d};
61 IfxAsclin_Rx_In IfxAsclin3_RXE_P00_1_IN = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, Ifx_RxSel_e};
62 IfxAsclin_Rx_In IfxAsclin3_RXF_P21_6_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 6}, Ifx_RxSel_f};
63 IfxAsclin_Rx_In IfxAsclin3_RXG_P21_2_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 2}, Ifx_RxSel_g};
64 IfxAsclin_Rx_In IfxAsclin3_RXG_P21_3_IN = {&MODULE_ASCLIN3, {&MODULE_P21, 3}, Ifx_RxSel_g};
99 IfxAsclin_Tx_Out IfxAsclin0_TX_P14_0_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 0}, IfxPort_OutputIdx_alt2};
100 IfxAsclin_Tx_Out IfxAsclin0_TX_P14_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P14, 1}, IfxPort_OutputIdx_alt2};
101 IfxAsclin_Tx_Out IfxAsclin0_TX_P15_2_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 2}, IfxPort_OutputIdx_alt2};
102 IfxAsclin_Tx_Out IfxAsclin0_TX_P15_3_OUT = {&MODULE_ASCLIN0, {&MODULE_P15, 3}, IfxPort_OutputIdx_alt2};
103 IfxAsclin_Tx_Out IfxAsclin0_TX_P34_1_OUT = {&MODULE_ASCLIN0, {&MODULE_P34, 1}, IfxPort_OutputIdx_alt2};
104 IfxAsclin_Tx_Out IfxAsclin1_TX_P02_2_OUT = {&MODULE_ASCLIN1, {&MODULE_P02, 2}, IfxPort_OutputIdx_alt2};
105 IfxAsclin_Tx_Out IfxAsclin1_TX_P11_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P11,12}, IfxPort_OutputIdx_alt2};
106 IfxAsclin_Tx_Out IfxAsclin1_TX_P14_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P14,10}, IfxPort_OutputIdx_alt4};
107 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_0_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 0}, IfxPort_OutputIdx_alt2};
108 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_1_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 1}, IfxPort_OutputIdx_alt2};
109 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_4_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 4}, IfxPort_OutputIdx_alt2};
110 IfxAsclin_Tx_Out IfxAsclin1_TX_P15_5_OUT = {&MODULE_ASCLIN1, {&MODULE_P15, 5}, IfxPort_OutputIdx_alt2};
111 IfxAsclin_Tx_Out IfxAsclin1_TX_P20_10_OUT = {&MODULE_ASCLIN1, {&MODULE_P20,10}, IfxPort_OutputIdx_alt2};
112 IfxAsclin_Tx_Out IfxAsclin1_TX_P33_12_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,12}, IfxPort_OutputIdx_alt2};
113 IfxAsclin_Tx_Out IfxAsclin1_TX_P33_13_OUT = {&MODULE_ASCLIN1, {&MODULE_P33,13}, IfxPort_OutputIdx_alt2};
114 IfxAsclin_Tx_Out IfxAsclin2_TX_P02_0_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 0}, IfxPort_OutputIdx_alt2};
115 IfxAsclin_Tx_Out IfxAsclin2_TX_P02_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P02, 9}, IfxPort_OutputIdx_alt2};
116 IfxAsclin_Tx_Out IfxAsclin2_TX_P10_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P10, 5}, IfxPort_OutputIdx_alt2};
117 IfxAsclin_Tx_Out IfxAsclin2_TX_P14_2_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 2}, IfxPort_OutputIdx_alt2};
118 IfxAsclin_Tx_Out IfxAsclin2_TX_P14_3_OUT = {&MODULE_ASCLIN2, {&MODULE_P14, 3}, IfxPort_OutputIdx_alt2};
119 IfxAsclin_Tx_Out IfxAsclin2_TX_P32_5_OUT = {&MODULE_ASCLIN2, {&MODULE_P32, 5}, IfxPort_OutputIdx_alt2};
120 IfxAsclin_Tx_Out IfxAsclin2_TX_P33_8_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 8}, IfxPort_OutputIdx_alt2};
121 IfxAsclin_Tx_Out IfxAsclin2_TX_P33_9_OUT = {&MODULE_ASCLIN2, {&MODULE_P33, 9}, IfxPort_OutputIdx_alt2};
122 IfxAsclin_Tx_Out IfxAsclin3_TX_P00_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 0}, IfxPort_OutputIdx_alt3};
123 IfxAsclin_Tx_Out IfxAsclin3_TX_P00_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P00, 1}, IfxPort_OutputIdx_alt2};
124 IfxAsclin_Tx_Out IfxAsclin3_TX_P11_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 0}, IfxPort_OutputIdx_alt2};
125 IfxAsclin_Tx_Out IfxAsclin3_TX_P11_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P11, 1}, IfxPort_OutputIdx_alt3};
126 IfxAsclin_Tx_Out IfxAsclin3_TX_P15_6_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 6}, IfxPort_OutputIdx_alt2};
127 IfxAsclin_Tx_Out IfxAsclin3_TX_P15_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P15, 7}, IfxPort_OutputIdx_alt2};
128 IfxAsclin_Tx_Out IfxAsclin3_TX_P20_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 0}, IfxPort_OutputIdx_alt2};
129 IfxAsclin_Tx_Out IfxAsclin3_TX_P20_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P20, 3}, IfxPort_OutputIdx_alt2};
130 IfxAsclin_Tx_Out IfxAsclin3_TX_P21_7_OUT = {&MODULE_ASCLIN3, {&MODULE_P21, 7}, IfxPort_OutputIdx_alt2};
131 IfxAsclin_Tx_Out IfxAsclin3_TX_P22_0_OUT = {&MODULE_ASCLIN3, {&MODULE_P22, 0}, IfxPort_OutputIdx_alt2};
132 IfxAsclin_Tx_Out IfxAsclin3_TX_P22_1_OUT = {&MODULE_ASCLIN3, {&MODULE_P22, 1}, IfxPort_OutputIdx_alt2};
133 IfxAsclin_Tx_Out IfxAsclin3_TX_P32_2_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 2}, IfxPort_OutputIdx_alt2};
134 IfxAsclin_Tx_Out IfxAsclin3_TX_P32_3_OUT = {&MODULE_ASCLIN3, {&MODULE_P32, 3}, IfxPort_OutputIdx_alt2};
135 
136 
138  {
140  NULL_PTR
141  },
142  {
144  &IfxAsclin1_CTSB_P32_4_IN
145  },
146  {
148  &IfxAsclin2_CTSB_P33_5_IN
149  },
150  {
152  NULL_PTR
153  }
154 };
155 
157  {
159  NULL_PTR
160  },
161  {
163  &IfxAsclin1_RTS_P23_1_OUT
164  },
165  {
167  &IfxAsclin2_RTS_P33_4_OUT
168  },
169  {
171  NULL_PTR
172  }
173 };
174 
176  {
179  NULL_PTR,
181  NULL_PTR,
182  NULL_PTR,
183  NULL_PTR
184  },
185  {
192  &IfxAsclin1_RXG_P02_3_IN
193  },
194  {
201  &IfxAsclin2_RXG_P02_0_IN
202  },
203  {
210  &IfxAsclin3_RXG_P21_2_IN
211  }
212 };
213 
215  {
218  NULL_PTR,
219  NULL_PTR,
220  NULL_PTR,
221  NULL_PTR,
222  NULL_PTR,
223  NULL_PTR,
224  NULL_PTR,
225  NULL_PTR,
226  NULL_PTR
227  },
228  {
233  NULL_PTR,
234  NULL_PTR,
235  NULL_PTR,
236  NULL_PTR,
237  NULL_PTR,
238  NULL_PTR,
239  NULL_PTR
240  },
241  {
247  NULL_PTR,
248  NULL_PTR,
249  NULL_PTR,
250  NULL_PTR,
251  NULL_PTR,
252  NULL_PTR
253  },
254  {
265  &IfxAsclin3_SCLK_P33_2_OUT
266  }
267 };
268 
270  {
271  NULL_PTR,
272  NULL_PTR,
273  NULL_PTR,
274  NULL_PTR,
275  NULL_PTR,
276  NULL_PTR
277  },
278  {
282  NULL_PTR,
283  NULL_PTR,
284  NULL_PTR
285  },
286  {
290  NULL_PTR,
291  NULL_PTR,
292  NULL_PTR
293  },
294  {
300  &IfxAsclin3_SLSO_P33_1_OUT
301  }
302 };
303 
305  {
311  NULL_PTR,
312  NULL_PTR,
313  NULL_PTR,
314  NULL_PTR,
315  NULL_PTR,
316  NULL_PTR,
317  NULL_PTR,
318  NULL_PTR
319  },
320  {
331  NULL_PTR,
332  NULL_PTR,
333  NULL_PTR
334  },
335  {
344  NULL_PTR,
345  NULL_PTR,
346  NULL_PTR,
347  NULL_PTR,
348  NULL_PTR
349  },
350  {
363  &IfxAsclin3_TX_P32_3_OUT
364  }
365 };