iLLD_TC27xC
1.0
SpiIf.h
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/**
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* \file SpiIf.h
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* \brief SPI interface types
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*
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* \version iLLD_0_1_0_10
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* \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
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*
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*
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* IMPORTANT NOTICE
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*
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*
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* Infineon Technologies AG (Infineon) is supplying this file for use
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* exclusively with Infineon's microcontroller products. This file can be freely
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* distributed within development tools that are supporting such microcontroller
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* products.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
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* OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
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* INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
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* OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
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*
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* \defgroup library_srvsw_if_spi SPI interface
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* \ingroup library_srvsw_if
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*
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*/
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#ifndef SPIIF_H
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#define SPIIF_H 1
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//________________________________________________________________________________________
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// INCLUDES
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#include "
Src/Std/IfxSrc.h
"
/* FIXME interface should not have dependencies to the HAL, an If type needs to be defined */
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/** \addtogroup library_srvsw_if_spi
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* \{ */
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//________________________________________________________________________________________
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// CONFIGURATION SWITCHES
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//________________________________________________________________________________________
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// HELPER MACROS
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//________________________________________________________________________________________
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// BASIC TYPES
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/** \brief SPI Interface Status */
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typedef
enum
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{
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SpiIf_Status_ok
,
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SpiIf_Status_busy
,
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SpiIf_Status_unknown
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}
SpiIf_Status
;
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/** \brief Slave select output timing */
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typedef
enum
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{
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SpiIf_SlsoTiming_0
= 0,
/**< zero delay clock */
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SpiIf_SlsoTiming_1
,
/**< 1 half-clock delay */
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SpiIf_SlsoTiming_2
,
/**< 2 half-clock delay */
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SpiIf_SlsoTiming_3
,
/**< 3 half-clock delay */
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SpiIf_SlsoTiming_4
,
/**< 4 half-clock delay */
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SpiIf_SlsoTiming_5
,
/**< 5 half-clock delay */
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SpiIf_SlsoTiming_6
,
/**< 6 half-clock delay */
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SpiIf_SlsoTiming_7
/**< 7 half-clock delay */
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}
SpiIf_SlsoTiming
;
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/** \brief Heading */
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typedef
enum
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{
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SpiIf_DataHeading_lsbFirst
= 0,
/**< LSB first */
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SpiIf_DataHeading_msbFirst
/**< MSB first */
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}
SpiIf_DataHeading
;
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/** \brief Clock phase */
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typedef
enum
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{
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SpiIf_ShiftClock_shiftTransmitDataOnLeadingEdge
= 0,
/**< Shift Tx data on leading edge */
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SpiIf_ShiftClock_shiftTransmitDataOnTrailingEdge
/**< Shift Tx data on training edge */
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}
SpiIf_ShiftClock
;
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/** \brief Clock polarity */
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typedef
enum
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{
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SpiIf_ClockPolarity_idleLow
= 0,
/**< Idle clock line is low */
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SpiIf_ClockPolarity_idleHigh
/**< Idle clock line is high */
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}
SpiIf_ClockPolarity
;
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//________________________________________________________________________________________
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// DATA STRUCTURES
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/** \brief Alias to the channel structure */
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typedef
struct
SpiIf_Ch_
SpiIf_Ch
;
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typedef
struct
SpiIf_ChConfig_
SpiIf_ChConfig
;
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typedef
struct
SpiIf_
SpiIf
;
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typedef
volatile
struct
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{
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uint32
onTransfer : 1;
/**< \brief Channel status: On transfer */
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uint32
byteAccess : 1;
/**< \brief Channel status: 8bit / 16 bit access */
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}
SpiIf_Flags
;
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typedef
struct
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{
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void
*
data
;
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Ifx_SizeT
remaining
;
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}
SpiIf_Job
;
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/** SPI operation modes */
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typedef
enum
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{
/* FIXME check conflicts with IfxQspi_Mode */
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SpiIf_Mode_master
,
/**< \brief Master mode */
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SpiIf_Mode_slave
,
/**< \brief Slave mode */
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SpiIf_Mode_undefined
/**< \brief Undefined mode */
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}
SpiIf_Mode
;
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typedef
SpiIf_Status
(*
SpiIf_Exchange
)(
SpiIf_Ch
*handle,
const
void
*src,
void
*dest,
Ifx_SizeT
numOfData);
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typedef
SpiIf_Status
(*
SpiIf_GetStatus
)(
SpiIf_Ch
*handle);
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typedef
void (*
SpiIf_OnEvent
)(
SpiIf
*handle);
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typedef
struct
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{
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SpiIf_Exchange
exchange
;
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SpiIf_GetStatus
getStatus
;
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SpiIf_OnEvent
onTx
;
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SpiIf_OnEvent
onRx
;
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SpiIf_OnEvent
onError
;
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}
SpiIf_funcs
;
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struct
SpiIf_
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{
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pvoid
driver
;
/**< \brief Spi specific driver */
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uint32
sending
;
/**< \brief */
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SpiIf_Ch
*
activeChannel
;
/**< \brief Channel actually transmitting / receiving */
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uint32
txCount
;
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uint32
rxCount
;
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SpiIf_funcs
functions
;
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};
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typedef
struct
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{
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SpiIf_Mode
mode
;
/**< \brief Specifies the interface operation mode */
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Ifx_Priority
rxPriority
;
/**< \brief Specifies the priority of the receive interrupt */
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Ifx_Priority
txPriority
;
/**< \brief Specifies the priority of the transmit interrupt */
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Ifx_Priority
erPriority
;
/**< \brief Specifies the priority of the error interrupt */
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IfxSrc_Tos
isrProvider
;
/**< \brief Specifies the handler of the interrupts */
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Ifx_SizeT
bufferSize
;
/**< \brief Specifies the number of channels that can be buffered. If 0, buffering is disabled */
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void
*
buffer
;
/**< \brief Specifies the buffer location.The buffer parameter must point on a free memory location where the
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* buffer object will be initialised. The Size of this area must be at least
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* equals to "Size + sizeof(Ifx_Fifo) + 8",
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* with "Size=config->bufferSize * Ifx_AlignOn32(sizeof(Spi_Ch*))". Not tacking
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* this in account may result in unpredictable behaviour. */
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float32
maximumBaudrate
;
/**< \brief Maximum baudrate used by the channels, this value is used to optimise the SPI internal clock */
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}
SpiIf_Config
;
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typedef
struct
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{
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uint32
baudrate : 1;
/**< \brief TRUE = checked, FALSE = ignored */
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uint32
phase : 1;
/**< \brief TRUE = checked, FALSE = ignored */
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uint32
receive : 1;
/**< \brief TRUE = checked, FALSE = ignored */
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uint32
transmit : 1;
/**< \brief TRUE = checked, FALSE = ignored */
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uint32
reserved : 28;
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}
Spi_ErrorChecks
;
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/** Channel operation mode */
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typedef
struct
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{
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uint32
enabled : 1;
/**< \brief 1 = channel enabled, 0 = channel disabled */
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uint32
autoCS : 1;
/**< \brief 1 = chip select is controlled by the hardware module or, 0 = by software. */
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uint32
loopback : 1;
/**< \brief 0 = normal mode, 1 = loopback mode */
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uint32
clockPolarity : 1;
/**< \brief \ref SpiIf_ClockPolarity*/
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uint32
shiftClock : 1;
/**< \brief \ref SpiIf_ShiftClock */
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uint32
dataHeading : 1;
/**< \brief \ref SpiIf_DataHeading */
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uint32
dataWidth : 6;
/**< \brief range 2 .. 32 bits (note 2 = 2-bits, 3 = 3-bits ... */
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uint32
csActiveLevel : 1;
/**< \brief \ref Ifx_ActiveState */
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uint32
csLeadDelay : 3;
/**< \brief \ref SpiIf_SlsoTiming */
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uint32
csTrailDelay : 3;
/**< \brief \ref SpiIf_SlsoTiming */
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uint32
csInactiveDelay : 3;
/**< \brief \ref SpiIf_SlsoTiming */
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uint32
parityCheck : 1;
/**< \brief 0 = disabled, 1 = enabled */
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uint32
parityMode : 1;
/**< \brief \ref Ifx_ParityMode */
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}
SpiIf_ChMode
;
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/** \brief SPI channel callback prototype */
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typedef
void (*
SpiIf_Cbk
)(
void
*data);
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typedef
void (*
TxRxHandler
)(
SpiIf_Ch
*handle);
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struct
SpiIf_Ch_
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{
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SpiIf
*
driver
;
/**< \brief Pointer to the SPI interface driver */
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SpiIf_Flags
flags
;
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Spi_ErrorChecks
errorChecks
;
/**< \brief Error checks */
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sint32
baudrate
;
/**< \brief Real baudrate */
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SpiIf_Job
tx
;
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SpiIf_Job
rx
;
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SpiIf_Cbk
onExchangeEnd
;
/**< \brief Specifies the callback function on end of exchange */
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void
*
callbackData
;
/**< \brief Specifies pointer to the user specific data on transmit end */
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TxRxHandler
txHandler
;
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TxRxHandler
rxHandler
;
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};
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struct
SpiIf_ChConfig_
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{
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SpiIf
*
driver
;
/**< \brief Pointer to an implementation of SPI interface driver, e.g. \ref IfxQspi_Spi */
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float32
baudrate
;
/**< \brief Specifies the SPI baudrate */
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SpiIf_ChMode
mode
;
/**< \brief */
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Spi_ErrorChecks
errorChecks
;
/**< \brief */
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};
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//________________________________________________________________________________________
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// EXPORTED VARIABLES
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//________________________________________________________________________________________
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// FUNCTION PROTOTYPES
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IFX_INLINE
void
SpiIf_wait
(
SpiIf_Ch
*handle);
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IFX_EXTERN
void
SpiIf_initConfig
(
SpiIf_Config
*config);
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IFX_EXTERN
void
SpiIf_initChannelConfig
(
SpiIf_ChConfig
*config,
SpiIf
*driver);
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/** \name Virtual functions
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* These functions are implemented by a driver.
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* \{ */
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IFX_INLINE
SpiIf_Status
SpiIf_exchange
(
SpiIf_Ch
*handle,
const
void
*src,
void
*dest,
Ifx_SizeT
numOfData);
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IFX_INLINE
SpiIf_Status
SpiIf_getStatus
(
SpiIf_Ch
*handle);
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/** \} */
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/** \} */
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//________________________________________________________________________________________
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// INLINE FUNCTION IMPLEMENTATIONS
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/** Wait as long as the transmission is on-going
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* \note This function blocks CPU for some-time */
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IFX_INLINE
void
SpiIf_wait
(
SpiIf_Ch
*handle)
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{
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while
(handle->
flags
.
onTransfer
!=
FALSE
)
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{}
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}
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/** Perform the SPI exchange operation.
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* \param src Pointer to the start of data buffer for data to transmit
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* \param dest Pointer to the start of data buffer for received data
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* \note the src and dest may be the same data location.
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*/
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IFX_INLINE
SpiIf_Status
SpiIf_exchange
(
SpiIf_Ch
*handle,
const
void
*src,
void
*dest,
Ifx_SizeT
numOfData)
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{
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return
handle->
driver
->
functions
.
exchange
(handle, src, dest, numOfData);
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}
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IFX_INLINE
SpiIf_Status
SpiIf_getStatus
(
SpiIf_Ch
*handle)
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{
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return
handle->
driver
->
functions
.
getStatus
(handle);
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}
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//________________________________________________________________________________________
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#endif
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SpiIf.h
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