iLLD_TC27xC
1.0
|
ETH basic functionality. More...
#include "_Impl/IfxEth_cfg.h"
#include "Cpu/Std/Ifx_Types.h"
#include "IfxEth_reg.h"
#include "Src/Std/IfxSrc.h"
#include "_PinMap/IfxEth_PinMap.h"
#include "_Utilities/Ifx_Assert.h"
Go to the source code of this file.
Data Structures | |
struct | IfxEth_AltRxDescr0_Bits |
Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access. More... | |
struct | IfxEth_AltRxDescr1_Bits |
Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access. More... | |
struct | IfxEth_AltTxDescr0_Bits |
Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access. More... | |
struct | IfxEth_AltTxDescr1_Bits |
Structure for Alternate/Enhanced TX descriptor DWORD 1 Bit field access. More... | |
union | IfxEth_RxDescr0 |
Union for RX descriptor DWORD 0. More... | |
union | IfxEth_RxDescr1 |
Union for RX descriptor DWORD 1. More... | |
union | IfxEth_RxDescr2 |
Union for RX descriptor DWORD 2. More... | |
union | IfxEth_RxDescr3 |
Union for RX descriptor DWORD 3. More... | |
union | IfxEth_TxDescr0 |
Union for TX descriptor DWORD 0. More... | |
union | IfxEth_TxDescr1 |
Union for TX descriptor DWORD 1. More... | |
union | IfxEth_TxDescr2 |
Union for TX descriptor DWORD 2. More... | |
union | IfxEth_TxDescr3 |
Union for TX descriptor DWORD 3. More... | |
struct | IfxEth_RxDescr |
Normal RX descriptor. More... | |
struct | IfxEth_TxDescr |
Normal TX descriptor. More... | |
struct | IfxEth_PortPins |
Port pins configuration. More... | |
struct | IfxEth_Config |
ETH configuration structure. More... | |
union | IfxEth_RxDescrList |
union | IfxEth_TxDescrList |
struct | IfxEth |
ETH driver structure. More... | |
struct | IfxEth_RxDescr0_Bits |
Structure for RX descriptor DWORD 0 Bit field access. More... | |
struct | IfxEth_RxDescr1_Bits |
Structure for RX descriptor DWORD 1 Bit field access. More... | |
struct | IfxEth_TxDescr0_Bits |
Structure for TX descriptor DWORD 0 Bit field access. More... | |
struct | IfxEth_TxDescr1_Bits |
Structure for TX descriptor DWORD 1 Bit field access. More... | |
Macros | |
#define | IFXETH_RTX_BUFFER_SIZE 1536 |
Size of one ethernet frame buffer. More... | |
#define | IFXETH_TX_BUFFER_BY_USER 0 |
#define | IFXETH_RX_BUFFER_BY_USER 0 |
#define | IFXETH_MAX_RX_BUFFERS 8 |
Rx buffers (ring mode) More... | |
#define | IFXETH_MAX_TX_BUFFERS 16 |
Tx buffers (ring mode) More... | |
#define | IFXETH_DESCR_SIZE 4 |
4 DWORDS (16 bytes) More... | |
Enumerations | |
enum | IfxEth_ChecksumMode { IfxEth_ChecksumMode_bypass = 0, IfxEth_ChecksumMode_ipv4 = 1, IfxEth_ChecksumMode_tcpUdpIcmpSegment = 2, IfxEth_ChecksumMode_tcpUdpIcmpFull = 3 } |
Functions | |
IFX_INLINE void * | IfxEth_waitTransmitBuffer (IfxEth *eth) |
Waits for one TX buffer becomes available. More... | |
IFX_INLINE void | IfxEth_setLoopbackMode (IfxEth *eth, boolean loopbackMode) |
Sets the MAC address. More... | |
IFX_INLINE void | IfxEth_clearTxInterrupt (IfxEth *eth) |
Clear transmit interrupt request. More... | |
IFX_INLINE void | IfxEth_clearRxInterrupt (IfxEth *eth) |
Clear receive interrupt request. More... | |
IFX_INLINE void | IfxEth_TxDescr_setBuffer (IfxEth_TxDescr *descr, void *buffer) |
Set buffer of a TX descriptor. More... | |
IFX_INLINE boolean | IfxEth_TxDescr_isAvailable (IfxEth_TxDescr *descr) |
Return TRUE if a TX descriptor is available for setup. More... | |
IFX_INLINE IfxEth_TxDescr * | IfxEth_TxDescr_getNext (IfxEth_TxDescr *descr) |
Get pointer to next TX descriptor. More... | |
IFX_INLINE void | IfxEth_RxDescr_setBuffer (IfxEth_RxDescr *descr, void *buffer) |
Set buffer of an RX descriptor. More... | |
IFX_EXTERN void | IfxEth_startReceiver (IfxEth *eth) |
Start the receiver functions. More... | |
IFX_EXTERN void | IfxEth_setMacAddress (IfxEth *eth, const uint8 *macAddress) |
Sets the MAC address. More... | |
IFX_EXTERN void | IfxEth_sendTransmitBuffer (IfxEth *eth, uint16 len) |
Request to send the transmit buffer. More... | |
IFX_EXTERN void | IfxEth_freeReceiveBuffer (IfxEth *eth) |
Free the receive buffer, enabling it for the further reception. More... | |
IFX_INLINE IfxEth_RxDescr * | IfxEth_RxDescr_getNext (IfxEth_RxDescr *descr) |
Get pointer to next RX descriptor. More... | |
IFX_INLINE IfxEth_RxDescr * | IfxEth_getActualRxDescriptor (IfxEth *eth) |
Get pointer to actual RX descriptor. More... | |
IFX_INLINE void | IfxEth_shuffleTxDescriptor (IfxEth *eth) |
Shuffle to next TX descriptor. More... | |
IFX_INLINE void | IfxEth_shuffleRxDescriptor (IfxEth *eth) |
Shuffle to next RX descriptor. More... | |
IFX_INLINE boolean | IfxEth_isTxInterrupt (IfxEth *eth) |
Checks whether transmit interrupt is requested. More... | |
IFX_INLINE boolean | IfxEth_isRxInterrupt (IfxEth *eth) |
Checks whether receive interrupt is requested. More... | |
IFX_INLINE boolean | IfxEth_isRxDataAvailable (IfxEth *eth) |
Checks whether one or more RX data is available. More... | |
IFX_INLINE boolean | IfxEth_isRxChecksumError (IfxEth *eth) |
IFX_INLINE boolean | IfxEth_isLinkActive (IfxEth *eth) |
Checks whether physical connection is active. More... | |
IFX_INLINE uint16 | IfxEth_getRxDataLength (IfxEth *eth) |
Returns length of the oldest available RX data. More... | |
IFX_INLINE void * | IfxEth_getMacAddressPointer (IfxEth *eth) |
Returns pointer to the MAC address configured for this ETH. More... | |
IFX_INLINE boolean | IfxEth_getLoopbackMode (IfxEth *eth) |
Get a free transmit buffer. More... | |
IFX_INLINE IfxEth_TxDescr * | IfxEth_getBaseTxDescriptor (IfxEth *eth) |
Get pointer to base TX descriptor. More... | |
IFX_INLINE IfxEth_RxDescr * | IfxEth_getBaseRxDescriptor (IfxEth *eth) |
Get pointer to base RX descriptor. More... | |
IFX_INLINE IfxEth_TxDescr * | IfxEth_getActualTxDescriptor (IfxEth *eth) |
Get pointer to actual TX descriptor. More... | |
IFX_INLINE uint32 | IfxEth_getActualRxIndex (IfxEth *eth) |
IFX_INLINE void | IfxEth_TxDescr_release (IfxEth_TxDescr *descr) |
Release a TX descriptor for transmit queue. More... | |
IFX_INLINE void | IfxEth_RxDescr_release (IfxEth_RxDescr *descr) |
release RX descriptor More... | |
IFX_EXTERN void | IfxEth_wakeupTransmitter (IfxEth *eth) |
Wakeup the transmitter functions. More... | |
IFX_EXTERN void | IfxEth_wakeupReceiver (IfxEth *eth) |
Wakeup the receiver functions. More... | |
IFX_EXTERN void | IfxEth_stopTransmitter (IfxEth *eth) |
Stop the transmitter functions. More... | |
IFX_EXTERN void | IfxEth_startTransmitter (IfxEth *eth) |
Start the transmitter functions. More... | |
IFX_EXTERN void | IfxEth_setupChecksumEngine (IfxEth *eth, IfxEth_ChecksumMode mode) |
Set up checksum Engine. More... | |
IFX_EXTERN void | IfxEth_setAndSendTransmitBuffer (IfxEth *eth, void *buffer, uint16 len) |
IFX_EXTERN void | IfxEth_readMacAddress (IfxEth *eth, uint8 *macAddress) |
Reads the MAC address from module register. More... | |
IFX_EXTERN void * | IfxEth_getTransmitBuffer (IfxEth *eth) |
Get a free transmit buffer. More... | |
IFX_EXTERN void * | IfxEth_getReceiveBuffer (IfxEth *eth) |
Gets receive buffer note: IfxEth_freeReceiveBuffer() shall be called after the data from the RX buffer has been processed. More... | |
IFX_EXTERN void | IfxEth_enableModule (void) |
Enable ETH Module. More... | |
IFX_INLINE void | IfxEth_TxDescr_setup (IfxEth_TxDescr *descr, uint16 length, boolean firstSegment, boolean lastSegment) |
Setup some properties of a TX descriptor. More... | |
IFX_EXTERN void | IfxEth_setupOutputPins (IfxEth *eth, const IfxEth_PortPins *portPins) |
set output pin of port More... | |
IFX_EXTERN void | IfxEth_setupInputPins (IfxEth *eth, const IfxEth_PortPins *portPins) |
Set up input pins. More... | |
IFX_EXTERN void | IfxEth_init (IfxEth *eth, const IfxEth_Config *config) |
Initialises the driver. More... | |
Variables | |
IFX_EXTERN uint8 | IfxEth_rxBuffer [IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE] |
receive buffers More... | |
IFX_EXTERN IfxEth_RxDescrList | IfxEth_rxDescr |
IFX_EXTERN uint8 | IfxEth_txBuffer [IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE] |
Transmit buffers. More... | |
IFX_EXTERN IfxEth_TxDescrList | IfxEth_txDescr |
ETH basic functionality.
IMPORTANT NOTICE
Infineon Technologies AG (Infineon) is supplying this file for use exclusively with Infineon's microcontroller products. This file can be freely distributed within development tools that are supporting such microcontroller products.
THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE. INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
Definition in file IfxEth.h.
struct IfxEth_AltRxDescr0_Bits |
Structure for Alternate/Enhanced RX descriptor DWORD 0 Bit field access.
Data Fields | ||
---|---|---|
uint32 | AFM: 1 | Destination Address Filter Fail. |
uint32 | CE: 1 | CRC Error. |
uint32 | DBE: 1 | Dribble Bit Error. |
uint32 | DE: 1 | Descriptor Error. |
uint32 | ES: 1 | Error Summary, ES = PCE | CE | RE | RWT | LC | IPC | OE | DE. |
uint32 | ext: 1 | Extended Status Available/Rx MAC Address. |
uint32 | FL: 14 | Frame Length. |
uint32 | FS: 1 | First Descriptor. |
uint32 | FT: 1 | Frame Type. |
uint32 | IPC: 1 | IPC Checksum Error/Giant Frame. |
uint32 | LC: 1 | Late Collision. |
uint32 | LE: 1 | Length Error. |
uint32 | LS: 1 | Last Descriptor. |
uint32 | OE: 1 | Overflow Error. |
uint32 | OWN: 1 | Own Bit, 1 = own by DMA. |
uint32 | RE: 1 | Receive Error. |
uint32 | RWT: 1 | Receive Watchdog Timeout. |
uint32 | SAF: 1 | Source Address Filter Fail. |
uint32 | VLAN: 1 | VLAN Tag. |
struct IfxEth_AltRxDescr1_Bits |
Structure for Alternate/Enhanced RX descriptor DWORD 1 Bit field access.
Data Fields | ||
---|---|---|
uint32 | DIC: 1 | Disable Interrupt on Completion. |
uint32 | RBS1: 13 | Receive Buffer 1 Size. |
uint32 | RBS2: 13 | Receive Buffer 2 Size. |
uint32 | RCH: 1 | Second Address Chained. |
uint32 | RER: 1 | Receive End of Ring. |
uint32 | resv: 2 | reserved) |
uint32 | resv1: 1 | reserved |
struct IfxEth_AltTxDescr0_Bits |
Structure for Alternate/Enhanced TX descriptor DWORD 0 Bit field access.
Data Fields | ||
---|---|---|
uint32 | CC: 4 | Collision count. |
uint32 | CIC: 2 | Checksum Insertion Control. |
uint32 | DB: 1 | Deferred bit. |
uint32 | DC: 1 | Disable CRC. |
uint32 | DP: 1 | Disable Padding. |
uint32 | EC: 1 | Excessive Collision. |
uint32 | ED: 1 | Excessive deferral. |
uint32 | ES: 1 | Error Summary, ES = JT | FF | LOC | NC | LC | EC | ED | UF. |
uint32 | FF: 1 | Frame Flushed. |
uint32 | FS: 1 | First Segment. |
uint32 | IC: 1 | Interrupt on Completion. |
uint32 | IHE: 1 | IP Header Error. |
uint32 | JT: 1 | Jabber Timeout. |
uint32 | LC: 1 | Late Collision. |
uint32 | LOC: 1 | Loss of Carrier. |
uint32 | LS: 1 | Last Segment. |
uint32 | NC: 1 | No Carrier. |
uint32 | OWN: 1 | Own Bit, 1 = own by DMA. |
uint32 | PCE: 1 | Payload Checksum Error. |
uint32 | resv: 2 | (reserved) |
uint32 | resv1: 1 | (Reserved) |
uint32 | TCH: 1 | Second Address Chained. |
uint32 | TER: 1 | Transmit End of Ring. |
uint32 | TTSE: 1 | Transmit Time Stamp Enable. |
uint32 | TTSS: 1 | Transmit Time Stamp Status. |
uint32 | UF: 1 | Underflow error. |
uint32 | VLAN: 1 | VLAN TAG. |
struct IfxEth_AltTxDescr1_Bits |
struct IfxEth_PortPins |
Data Fields | ||
---|---|---|
IfxEth_Crsdv_In * | crsDiv | pointer to CRSDIV input pin configtring_here |
IfxEth_Mdc_Out * | mdc | Pointer to MDC output pin config. |
IfxEth_Mdio_InOut * | mdio | Pointer to MDIO pin config. |
IfxEth_Refclk_In * | refClk | Pointer to REFCLK input pin config. |
IfxEth_Rxd_In * | rxd0 | Pointer to RXD0 input pin config. |
IfxEth_Rxd_In * | rxd1 | Pointer to RXD1 input pin config. |
IfxEth_Txd_Out * | txd0 | Pointer to TXD0 output pin config. |
IfxEth_Txd_Out * | txd1 | Pointer to TXD1 output pin config. |
IfxEth_Txen_Out * | txEn | Pointer to TXEN output pin config. |
union IfxEth_RxDescrList |
Data Fields | ||
---|---|---|
IfxEth_RxDescr | items[IFXETH_MAX_RX_BUFFERS] | |
uint32 | U[IFXETH_MAX_RX_BUFFERS][IFXETH_DESCR_SIZE] |
union IfxEth_TxDescrList |
Data Fields | ||
---|---|---|
IfxEth_TxDescr | items[IFXETH_MAX_TX_BUFFERS] | |
uint32 | U[IFXETH_MAX_TX_BUFFERS][IFXETH_DESCR_SIZE] |
#define IFXETH_DESCR_SIZE 4 |
#define IFXETH_MAX_TX_BUFFERS 16 |
Tx buffers (ring mode)
Definition at line 76 of file IfxEth.h.
Referenced by IfxEth_setupChecksumEngine().
#define IFXETH_RTX_BUFFER_SIZE 1536 |
enum IfxEth_ChecksumMode |
IFX_EXTERN uint8 IfxEth_rxBuffer[IFXETH_MAX_RX_BUFFERS][IFXETH_RTX_BUFFER_SIZE] |
IFX_EXTERN IfxEth_RxDescrList IfxEth_rxDescr |
IFX_EXTERN uint8 IfxEth_txBuffer[IFXETH_MAX_TX_BUFFERS][IFXETH_RTX_BUFFER_SIZE] |
IFX_EXTERN IfxEth_TxDescrList IfxEth_txDescr |