iLLD_TC27xC  1.0
IfxGpt12_PinMap.h
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1 /**
2  * \file IfxGpt12_PinMap.h
3  * \brief GPT12 I/O map
4  * \ingroup IfxLld_Gpt12
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Gpt12_pinmap GPT12 Pin Mapping
25  * \ingroup IfxLld_Gpt12
26  */
27 
28 #ifndef IFXGPT12_PINMAP_H
29 #define IFXGPT12_PINMAP_H
30 
31 #include <_Reg/IfxGpt12_reg.h>
32 #include <_Impl/IfxGpt12_cfg.h>
33 #include <Port/Std/IfxPort.h>
34 
35 /** \addtogroup IfxLld_Gpt12_pinmap
36  * \{ */
37 
38 /** \brief CAPIN pin mapping structure */
39 typedef const struct
40 {
41  Ifx_GPT12* module; /**< \brief Base address */
42  IfxPort_Pin pin; /**< \brief Port pin */
43  Ifx_RxSel select; /**< \brief Input multiplexer value */
45 
46 /** \brief TxEUD pin mapping structure */
47 typedef const struct
48 {
49  Ifx_GPT12* module; /**< \brief Base address */
50  uint8 timer; /**< \brief Timer number */
51  IfxPort_Pin pin; /**< \brief Port pin */
52  Ifx_RxSel select; /**< \brief Input multiplexer value */
54 
55 /** \brief TxIN pin mapping structure */
56 typedef const struct
57 {
58  Ifx_GPT12* module; /**< \brief Base address */
59  uint8 timer; /**< \brief Timer number */
60  IfxPort_Pin pin; /**< \brief Port pin */
61  Ifx_RxSel select; /**< \brief Input multiplexer value */
63 
64 /** \brief TxOUT pin mapping structure */
65 typedef const struct
66 {
67  Ifx_GPT12* module; /**< \brief Base address */
68  uint8 timer; /**< \brief Timer number */
69  IfxPort_Pin pin; /**< \brief Port pin */
70  IfxPort_OutputIdx select; /**< \brief Port control code */
72 
73 IFX_EXTERN IfxGpt12_Capin_In IfxGpt120_CAPINA_P13_2_IN; /**< \brief GPT120_CAPINA: GPT120 input */
74 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDA_P00_8_IN; /**< \brief GPT120_T2EUDA: GPT120 input */
75 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T2EUDB_P33_6_IN; /**< \brief GPT120_T2EUDB: GPT120 input */
76 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDA_P02_7_IN; /**< \brief GPT120_T3EUDA: GPT120 input */
77 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T3EUDB_P10_7_IN; /**< \brief GPT120_T3EUDB: GPT120 input */
78 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDA_P00_9_IN; /**< \brief GPT120_T4EUDA: GPT120 input */
79 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T4EUDB_P33_5_IN; /**< \brief GPT120_T4EUDB: GPT120 input */
80 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDA_P21_6_IN; /**< \brief GPT120_T5EUDA: GPT120 input */
81 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T5EUDB_P10_1_IN; /**< \brief GPT120_T5EUDB: GPT120 input */
82 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDA_P20_0_IN; /**< \brief GPT120_T6EUDA: GPT120 input */
83 IFX_EXTERN IfxGpt12_TxEud_In IfxGpt120_T6EUDB_P10_0_IN; /**< \brief GPT120_T6EUDB: GPT120 input */
84 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INA_P00_7_IN; /**< \brief GPT120_T2INA: GPT120 input */
85 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T2INB_P33_7_IN; /**< \brief GPT120_T2INB: GPT120 input */
86 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INA_P02_6_IN; /**< \brief GPT120_T3INA: GPT120 input */
87 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T3INB_P10_4_IN; /**< \brief GPT120_T3INB: GPT120 input */
88 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INA_P02_8_IN; /**< \brief GPT120_T4INA: GPT120 input */
89 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T4INB_P10_8_IN; /**< \brief GPT120_T4INB: GPT120 input */
90 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INA_P21_7_IN; /**< \brief GPT120_T5INA: GPT120 input */
91 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T5INB_P10_3_IN; /**< \brief GPT120_T5INB: GPT120 input */
92 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INA_P20_3_IN; /**< \brief GPT120_T6INA: GPT120 input */
93 IFX_EXTERN IfxGpt12_TxIn_In IfxGpt120_T6INB_P10_2_IN; /**< \brief GPT120_T6INB: GPT120 input */
94 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P10_6_OUT; /**< \brief GPT120_T3OUT: GPT120 output */
95 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T3OUT_P21_6_OUT; /**< \brief GPT120_T3OUT: GPT120 output */
96 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P10_5_OUT; /**< \brief GPT120_T6OUT: GPT120 output */
97 IFX_EXTERN IfxGpt12_TxOut_Out IfxGpt120_T6OUT_P21_7_OUT; /**< \brief GPT120_T6OUT: GPT120 output */
98 
99 /** \brief Table dimensions */
100 #define IFXGPT12_PINMAP_NUM_MODULES 1
101 #define IFXGPT12_PINMAP_NUM_TIMERS 7
102 #define IFXGPT12_PINMAP_CAPIN_IN_NUM_ITEMS 1
103 #define IFXGPT12_PINMAP_TXEUD_IN_NUM_ITEMS 2
104 #define IFXGPT12_PINMAP_TXIN_IN_NUM_ITEMS 2
105 #define IFXGPT12_PINMAP_TXOUT_OUT_NUM_ITEMS 2
106 
107 
108 /** \brief IfxGpt12_Capin_In table */
110 
111 /** \brief IfxGpt12_TxEud_In table */
113 
114 /** \brief IfxGpt12_TxIn_In table */
116 
117 /** \brief IfxGpt12_TxOut_Out table */
119 
120 /** \} */
121 
122 #endif /* IFXGPT12_PINMAP_H */