iLLD_TC27xC  1.0
IfxVadc.h
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1 /**
2  * \file IfxVadc.h
3  * \brief VADC basic functionality
4  * \ingroup IfxLld_Vadc
5  *
6  * \version iLLD_0_1_0_10
7  * \copyright Copyright (c) 2013 Infineon Technologies AG. All rights reserved.
8  *
9  *
10  * IMPORTANT NOTICE
11  *
12  *
13  * Infineon Technologies AG (Infineon) is supplying this file for use
14  * exclusively with Infineon's microcontroller products. This file can be freely
15  * distributed within development tools that are supporting such microcontroller
16  * products.
17  *
18  * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
19  * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
20  * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
21  * INFINEON SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL,
22  * OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
23  *
24  * \defgroup IfxLld_Vadc VADC
25  * \ingroup IfxLld
26  * \defgroup IfxLld_Vadc_Std Standard Driver
27  * \ingroup IfxLld_Vadc
28  * \defgroup IfxLld_Vadc_Std_Enum Enumerations
29  * \ingroup IfxLld_Vadc_Std
30  * \defgroup IfxLld_Vadc_Std_Background_Autoscan Background Autoscan Functions
31  * \ingroup IfxLld_Vadc_Std
32  * \defgroup IfxLld_Vadc_Std_ChannelScan Channel Scan Functions
33  * \ingroup IfxLld_Vadc_Std
34  * \defgroup IfxLld_Vadc_Std_QueueRequest Queue Request Functions
35  * \ingroup IfxLld_Vadc_Std
36  * \defgroup IfxLld_Vadc_Std_IO IO Pin Configuration Functions
37  * \ingroup IfxLld_Vadc_Std
38  * \defgroup IfxLld_Vadc_Std_Frequency Frequency Calculation
39  * \ingroup IfxLld_Vadc_Std
40  * \defgroup IfxLld_Vadc_Std_Group Group Functions
41  * \ingroup IfxLld_Vadc_Std
42  * \defgroup IfxLld_Vadc_Std_Module Module Functions
43  * \ingroup IfxLld_Vadc_Std
44  * \defgroup IfxLld_Vadc_Std_Channel Channel Functions
45  * \ingroup IfxLld_Vadc_Std
46  */
47 
48 #ifndef IFXVADC_H
49 #define IFXVADC_H 1
50 
51 /******************************************************************************/
52 /*----------------------------------Includes----------------------------------*/
53 /******************************************************************************/
54 
55 #include "_Impl/IfxVadc_cfg.h"
56 #include "_PinMap/IfxVadc_PinMap.h"
57 
58 /******************************************************************************/
59 /*--------------------------------Enumerations--------------------------------*/
60 /******************************************************************************/
61 
62 /** \addtogroup IfxLld_Vadc_Std_Enum
63  * \{ */
64 /** \brief Defined in MODULE_VADC.G[x].ARBCFG.B.ANONS and ANONC
65  */
66 typedef enum
67 {
68  IfxVadc_AnalogConverterMode_off = 0, /**< \brief Analog Converter off */
69  IfxVadc_AnalogConverterMode_slowStandby = 1, /**< \brief Slow Standby Mode */
70  IfxVadc_AnalogConverterMode_fastStandby = 2, /**< \brief Fast Standby Mode */
71  IfxVadc_AnalogConverterMode_normalOperation = 3 /**< \brief Normal operation mode */
73 
74 /** \brief Arbitration round length defined in MODULE_VADC.G[x].ARBCFG.ARBRND(x=0,1,..,11)
75  */
76 typedef enum
77 {
78  IfxVadc_ArbitrationRounds_4_slots = 0, /**< \brief An arbitration round contains 4 arbitration slots. */
79  IfxVadc_ArbitrationRounds_8_slots = 1, /**< \brief An arbitration round contains 8 arbitration slots. */
80  IfxVadc_ArbitrationRounds_16_slots = 2, /**< \brief An arbitration round contains 16 arbitration slots. */
81  IfxVadc_ArbitrationRounds_20_slots = 3 /**< \brief An arbitration round contains 20 arbitration slots. */
83 
84 /** \brief Boundary Extension defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELX(x=0,1,...,11;y=0,1....,16)
85  */
86 typedef enum
87 {
88  IfxVadc_BoundaryExtension_standard = 0, /**< \brief Boundary Standard mode. BNDSELU/BNDSELL as Boundaries */
89  IfxVadc_BoundaryExtension_fastCompareResult1 = 1, /**< \brief Fast compare mode use as upper boundary Channel result 1 */
90  IfxVadc_BoundaryExtension_fastCompareResult2 = 2, /**< \brief Fast compare mode use as upper boundary Channel result 2 */
91  IfxVadc_BoundaryExtension_fastCompareResult3 = 3, /**< \brief Fast compare mode use as upper boundary Channel result 3 */
92  IfxVadc_BoundaryExtension_fastCompareResult4 = 4, /**< \brief Fast compare mode use as upper boundary Channel result 4 */
93  IfxVadc_BoundaryExtension_fastCompareResult5 = 5, /**< \brief Fast compare mode use as upper boundary Channel result 5 */
94  IfxVadc_BoundaryExtension_fastCompareResult6 = 6, /**< \brief Fast compare mode use as upper boundary Channel result 6 */
95  IfxVadc_BoundaryExtension_fastCompareResult7 = 7, /**< \brief Fast compare mode use as upper boundary Channel result 7 */
96  IfxVadc_BoundaryExtension_fastCompareResult8 = 8, /**< \brief Fast compare mode use as upper boundary Channel result 8 */
97  IfxVadc_BoundaryExtension_fastCompareResult9 = 9, /**< \brief Fast compare mode use as upper boundary Channel result 9 */
98  IfxVadc_BoundaryExtension_fastCompareResult10 = 10, /**< \brief Fast compare mode use as upper boundary Channel result 10 */
99  IfxVadc_BoundaryExtension_fastCompareResult11 = 11, /**< \brief Fast compare mode use as upper boundary Channel result 11 */
100  IfxVadc_BoundaryExtension_fastCompareResult12 = 12, /**< \brief Fast compare mode use as upper boundary Channel result 12 */
101  IfxVadc_BoundaryExtension_fastCompareResult13 = 13, /**< \brief Fast compare mode use as upper boundary Channel result 13 */
102  IfxVadc_BoundaryExtension_fastCompareResult14 = 14, /**< \brief Fast compare mode use as upper boundary Channel result 14 */
103  IfxVadc_BoundaryExtension_fastCompareResult15 = 15 /**< \brief Fast compare mode use as upper boundary Channel result 15 */
105 
106 /** \brief BoundarySel defined in MODULE_VADC.G[x].CHCTR[y].B.BNDSELL(x=0,1,...,11;y=0,1....,16)
107  */
108 typedef enum
109 {
110  IfxVadc_BoundarySelection_group0 = 0, /**< \brief Use group class 0 */
111  IfxVadc_BoundarySelection_group1 = 1, /**< \brief Use group class 1 */
112  IfxVadc_BoundarySelection_global0 = 2, /**< \brief Use global class 0 */
113  IfxVadc_BoundarySelection_global1 = 3 /**< \brief Use global class 1 */
115 
116 /** \brief VADC Channels
117  */
118 typedef enum
119 {
120  IfxVadc_ChannelId_none = -1, /**< \brief None of VADC channels */
121  IfxVadc_ChannelId_0 = 0, /**< \brief Channel 0 */
122  IfxVadc_ChannelId_1 = 1, /**< \brief Channel 1 */
123  IfxVadc_ChannelId_2 = 2, /**< \brief Channel 2 */
124  IfxVadc_ChannelId_3 = 3, /**< \brief Channel 3 */
125  IfxVadc_ChannelId_4 = 4, /**< \brief Channel 4 */
126  IfxVadc_ChannelId_5 = 5, /**< \brief Channel 5 */
127  IfxVadc_ChannelId_6 = 6, /**< \brief Channel 6 */
128  IfxVadc_ChannelId_7 = 7, /**< \brief Channel 7 */
130 
131 /** \brief ADC channel reference defined in MODULE_VADC.G[x].CHCTR[y].B.REFSEL(x=0,1,...,11;y=0,1....,16)
132  */
133 typedef enum
134 {
135  IfxVadc_ChannelReference_standard = 0, /**< \brief use Varef as reference */
136  IfxVadc_ChannelReference_channel0 = 1 /**< \brief use CH0 as reference */
138 
139 /** \brief ADC channel resolution defined in MODULE_VADC.G[x].CHCTR[y].B.ICLASS[y].B.CMS(x=0,1,...,11;y=0,1)
140  */
141 typedef enum
142 {
143  IfxVadc_ChannelResolution_12bit = 0, /**< \brief 12-bit conversion */
144  IfxVadc_ChannelResolution_10bit = 1, /**< \brief 10-bit conversion */
145  IfxVadc_ChannelResolution_8bit = 2, /**< \brief 8-bit conversion */
146  IfxVadc_ChannelResolution_10bitFast = 5 /**< \brief 10-bit cfast compare mode */
148 
149 /** \brief Channel Result defined in MODULE_VADC.G[x].CHCTR[y].B.RESREG(x=0,1,...,11;y=0,1....,16)
150  */
151 typedef enum
152 {
153  IfxVadc_ChannelResult_0 = 0, /**< \brief Use Channel result 0 */
154  IfxVadc_ChannelResult_1, /**< \brief Use Channel result 1 */
155  IfxVadc_ChannelResult_2, /**< \brief Use Channel result 2 */
156  IfxVadc_ChannelResult_3, /**< \brief Use Channel result 3 */
157  IfxVadc_ChannelResult_4, /**< \brief Use Channel result 4 */
158  IfxVadc_ChannelResult_5, /**< \brief Use Channel result 5 */
159  IfxVadc_ChannelResult_6, /**< \brief Use Channel result 6 */
160  IfxVadc_ChannelResult_7, /**< \brief Use Channel result 7 */
161  IfxVadc_ChannelResult_8, /**< \brief Use Channel result 8 */
162  IfxVadc_ChannelResult_9, /**< \brief Use Channel result 9 */
163  IfxVadc_ChannelResult_10, /**< \brief Use Channel result 10 */
164  IfxVadc_ChannelResult_11, /**< \brief Use Channel result 11 */
165  IfxVadc_ChannelResult_12, /**< \brief Use Channel result 12 */
166  IfxVadc_ChannelResult_13, /**< \brief Use Channel result 13 */
167  IfxVadc_ChannelResult_14, /**< \brief Use Channel result 14 */
168  IfxVadc_ChannelResult_15, /**< \brief Use Channel result 15 */
170 
171 /** \brief gating mode defined in MODULE_VADC.BRSMR.ENGT
172  */
173 typedef enum
174 {
175  IfxVadc_GatingMode_disabled = 0, /**< \brief Gating is disabled, no conversion request are issued */
176  IfxVadc_GatingMode_always = 1, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set */
177  IfxVadc_GatingMode_gatingHigh = 2, /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is high */
178  IfxVadc_GatingMode_gatingLow = 3 /**< \brief Conversion request is issued if at least 1 conversion pending bit is set and the gating signal is low */
180 
181 /** \brief External trigger gating defined in MODULE_VADC.G[x].QCTRLy.GTSEL(x=0,1,..,11;y=0,1,..,7)
182  */
183 typedef enum
184 {
185  IfxVadc_GatingSource_0 = 0, /**< \brief Input signal REQGTx_0 */
186  IfxVadc_GatingSource_1, /**< \brief Input signal REQGTx_1 */
187  IfxVadc_GatingSource_2, /**< \brief Input signal REQGTx_2 */
188  IfxVadc_GatingSource_3, /**< \brief Input signal REQGTx_3 */
189  IfxVadc_GatingSource_4, /**< \brief Input signal REQGTx_4 */
190  IfxVadc_GatingSource_5, /**< \brief Input signal REQGTx_5 */
191  IfxVadc_GatingSource_6, /**< \brief Input signal REQGTx_6 */
192  IfxVadc_GatingSource_7, /**< \brief Input signal REQGTx_7 */
193  IfxVadc_GatingSource_8, /**< \brief Input signal REQGTx_8 */
194  IfxVadc_GatingSource_9, /**< \brief Input signal REQGTx_9 */
195  IfxVadc_GatingSource_10, /**< \brief Input signal REQGTx_10 */
196  IfxVadc_GatingSource_11, /**< \brief Input signal REQGTx_11 */
197  IfxVadc_GatingSource_12, /**< \brief Input signal REQGTx_12 */
198  IfxVadc_GatingSource_13, /**< \brief Input signal REQGTx_13 */
199  IfxVadc_GatingSource_14, /**< \brief Input signal REQGTx_14 */
200  IfxVadc_GatingSource_15, /**< \brief Input signal REQGTx_15 */
202 
203 /** \brief inputClass defined in MODULE_VADC.G[x].CHCTR[y].B.ICLSEL(x=0,1,...,11;y=0,1....,16)
204  */
205 typedef enum
206 {
207  IfxVadc_InputClasses_group0 = 0, /**< \brief Use group class 0 */
208  IfxVadc_InputClasses_group1 = 1, /**< \brief Use group class 1 */
209  IfxVadc_InputClasses_global0 = 2, /**< \brief Use global class 0 */
210  IfxVadc_InputClasses_global1 = 3 /**< \brief Use global class 1 */
212 
213 /** \brief ADC channel limit check defined in MODULE_VADC.G[x].CHCTR[y].B.CHEVMODE(x=0,1,...,11;y=0,1....,16)
214  */
215 typedef enum
216 {
217  IfxVadc_LimitCheck_noCheck = 0, /**< \brief Normal compare mode Event Never Fast Compare mode Event Never */
218  IfxVadc_LimitCheck_eventIfInArea = 1, /**< \brief Normal compare mode Event If result is inside the boundary band Fast Compare mode Event If result switches to high (above comp. value) */
219  IfxVadc_LimitCheck_eventIfOutsideArea = 2, /**< \brief Normal compare mode Event If result is outside the boundary band Fast Compare mode Event If result switches to low (below comp. value) */
220  IfxVadc_LimitCheck_always = 3 /**< \brief Normal compare mode Event Always Fast Compare mode Event Always */
222 
223 /** \brief Access protection for Group registers defined in MODULE_VADC.ACCPROT0.U
224  */
225 typedef enum
226 {
227  IfxVadc_Protection_channelControl0 = 0, /**< \brief Access control for GxCHCTR0 */
228  IfxVadc_Protection_channelControl1 = 1, /**< \brief Access control for GxCHCTR1 */
229  IfxVadc_Protection_channelControl2 = 2, /**< \brief Access control for GxCHCTR2 */
230  IfxVadc_Protection_channelControl3 = 3, /**< \brief Access control for GxCHCTR3 */
231  IfxVadc_Protection_channelControl4 = 4, /**< \brief Access control for GxCHCTR4 */
232  IfxVadc_Protection_channelControl5 = 5, /**< \brief Access control for GxCHCTR5 */
233  IfxVadc_Protection_channelControl6 = 6, /**< \brief Access control for GxCHCTR6 */
234  IfxVadc_Protection_channelControl7 = 7, /**< \brief Access control for GxCHCTR7 */
235  IfxVadc_Protection_channelControl8 = 8, /**< \brief Access control for GxCHCTR8 */
236  IfxVadc_Protection_channelControl9 = 9, /**< \brief Access control for GxCHCTR9 */
237  IfxVadc_Protection_channelControl10 = 10, /**< \brief Access control for GxCHCTR10 */
238  IfxVadc_Protection_channelControl11 = 11, /**< \brief Access control for GxCHCTR11 */
239  IfxVadc_Protection_channelControl12 = 12, /**< \brief Access control for GxCHCTR12 */
240  IfxVadc_Protection_channelControl13 = 13, /**< \brief Access control for GxCHCTR13 */
241  IfxVadc_Protection_channelControl14 = 14, /**< \brief Access control for GxCHCTR14 */
242  IfxVadc_Protection_externalMultiplexer = 15, /**< \brief Access control for EMUXSEL, GxEMUXCTR */
243  IfxVadc_Protection_initGroup0 = 16, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
244  IfxVadc_Protection_initGroup1 = 17, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
245  IfxVadc_Protection_initGroup2 = 18, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
246  IfxVadc_Protection_initGroup3 = 19, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
247  IfxVadc_Protection_initGroup4 = 20, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
248  IfxVadc_Protection_initGroup5 = 21, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
249  IfxVadc_Protection_initGroup6 = 22, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
250  IfxVadc_Protection_initGroup7 = 23, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
251  IfxVadc_Protection_initGroup8 = 24, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
252  IfxVadc_Protection_initGroup9 = 25, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
253  IfxVadc_Protection_initGroup10 = 26, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
254  IfxVadc_Protection_initGroup11 = 27, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
255  IfxVadc_Protection_initGroup12 = 28, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
256  IfxVadc_Protection_initGroup13 = 29, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
257  IfxVadc_Protection_initGroup14 = 30, /**< \brief Access control for GxARBCFG, GxARBPR, GxCHASS, GxRRASS, GxICLASS0/1, GxSYNCTR */
258  IfxVadc_Protection_globalConfig = 31, /**< \brief Access control for GLOBCFG */
259  IfxVadc_Protection_serviceGroup0 = 32, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
260  IfxVadc_Protection_serviceGroup1 = 33, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
261  IfxVadc_Protection_serviceGroup2 = 34, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
262  IfxVadc_Protection_serviceGroup3 = 35, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
263  IfxVadc_Protection_serviceGroup4 = 36, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
264  IfxVadc_Protection_serviceGroup5 = 37, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
265  IfxVadc_Protection_serviceGroup6 = 38, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
266  IfxVadc_Protection_serviceGroup7 = 39, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
267  IfxVadc_Protection_serviceGroup8 = 40, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
268  IfxVadc_Protection_serviceGroup9 = 41, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
269  IfxVadc_Protection_serviceGroup10 = 42, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
270  IfxVadc_Protection_serviceGroup11 = 43, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
271  IfxVadc_Protection_serviceGroup12 = 44, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
272  IfxVadc_Protection_serviceGroup13 = 45, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
273  IfxVadc_Protection_serviceGroup14 = 46, /**< \brief Access control for GxSEFLAG, GxSEVNP, GxCEFLAG, GxCEVNP0/1/2, GxREFLAG, GxREVNP0/1, GxSRACT */
274  IfxVadc_Protection_testFunction = 47, /**< \brief Access control for GLOBTF */
275  IfxVadc_Protection_resultRegisterGroup0 = 48, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
276  IfxVadc_Protection_resultRegisterGroup1 = 49, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
277  IfxVadc_Protection_resultRegisterGroup2 = 50, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
278  IfxVadc_Protection_resultRegisterGroup3 = 51, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
279  IfxVadc_Protection_resultRegisterGroup4 = 52, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
280  IfxVadc_Protection_resultRegisterGroup5 = 53, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
281  IfxVadc_Protection_resultRegisterGroup6 = 54, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
282  IfxVadc_Protection_resultRegisterGroup7 = 55, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
283  IfxVadc_Protection_resultRegisterGroup8 = 56, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
284  IfxVadc_Protection_resultRegisterGroup9 = 57, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
285  IfxVadc_Protection_resultRegisterGroup10 = 58, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
286  IfxVadc_Protection_resultRegisterGroup11 = 59, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
287  IfxVadc_Protection_resultRegisterGroup12 = 60, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
288  IfxVadc_Protection_resultRegisterGroup13 = 61, /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
289  IfxVadc_Protection_resultRegisterGroup14 = 62 /**< \brief Access control for GxRCRx(x=0,1,..,15), GxBOUND, GxRESx(x=0 .. 15) */
291 
292 /** \brief Arbitration priority, Group x,defined in MODULE_VADC.G[x].ARBPR.PRIOy(x=0,1,...,11;y=0,1,2)
293  */
294 typedef enum
295 {
296  IfxVadc_RequestSlotPriority_lowest = 0, /**< \brief Lowest priority */
297  IfxVadc_RequestSlotPriority_low = 1, /**< \brief Lowpriority */
298  IfxVadc_RequestSlotPriority_high = 2, /**< \brief High priority */
299  IfxVadc_RequestSlotPriority_highest = 3 /**< \brief Highest priority */
301 
302 /** \brief Request source start mode defined in MODULE_VADC.G[x].ARBPR.CSMy(x=0,1,...,11;y=0,1,2)
303  */
304 typedef enum
305 {
306  IfxVadc_RequestSlotStartMode_waitForStart = 0, /**< \brief Wait for start */
307  IfxVadc_RequestSlotStartMode_cancelInjectRepeat = 1 /**< \brief Cancel-Inject-Repeat */
309 
310 /** \brief Request sources
311  */
312 typedef enum
313 {
314  IfxVadc_RequestSource_queue = 0, /**< \brief 8 stage Queue request */
315  IfxVadc_RequestSource_scan = 1, /**< \brief scan request */
316  IfxVadc_RequestSource_background = 2 /**< \brief background scan request */
318 
319 /** \brief Service Node defined in MODULE_VADC.G[x].SRACT.U(x= 0,1,..,11)
320  */
321 typedef enum
322 {
323  IfxVadc_SrcNr_group0 = 0, /**< \brief service request line 0 of group */
324  IfxVadc_SrcNr_group1 = 1, /**< \brief service request line 1 of group */
325  IfxVadc_SrcNr_group2 = 2, /**< \brief service request line 2 of group */
326  IfxVadc_SrcNr_group3 = 3, /**< \brief service request line 3 of group */
327  IfxVadc_SrcNr_shared0 = 4, /**< \brief Select shared service request line 0 */
328  IfxVadc_SrcNr_shared1 = 5, /**< \brief Select shared service request line 1 */
329  IfxVadc_SrcNr_shared2 = 6, /**< \brief Select shared service request line 2 */
330  IfxVadc_SrcNr_shared3 = 7 /**< \brief Select shared service request line 3 */
331 } IfxVadc_SrcNr;
332 
333 /** \brief API return values defined in
334  * MODULE_VADC.G[x].QSR0.U,MODULE_VADC.G[x].ASPND.U
335  * MODULE_VADC.BRSPND[x](x=0,1,...,11)
336  */
337 typedef enum
338 {
339  IfxVadc_Status_noError = 0, /**< \brief No error during api execution */
340  IfxVadc_Status_notInitialised = 1, /**< \brief Appropriate initialisation not done */
341  IfxVadc_Status_invalidGroup = 2, /**< \brief Invalid group number */
342  IfxVadc_Status_invalidChannel = 3, /**< \brief Invalid channel number */
343  IfxVadc_Status_queueFull = 4, /**< \brief Queue is full */
344  IfxVadc_Status_noAccess = 5, /**< \brief Access to the group/channel is disabled */
345  IfxVadc_Status_channelsStillPending = 6 /**< \brief Conversion for some of the channels are still pending */
347 
348 /** \brief trigger definition defined in MODULE_VADC.G[x].QCTRL0.XTMODE(x=0,1,..,11)
349  */
350 typedef enum
351 {
352  IfxVadc_TriggerMode_noExternalTrigger = 0, /**< \brief No external trigger */
353  IfxVadc_TriggerMode_uponFallingEdge = 1, /**< \brief Trigger event upon a falling edge */
354  IfxVadc_TriggerMode_uponRisingEdge = 2, /**< \brief Trigger event upon a rising edge */
355  IfxVadc_TriggerMode_uponAnyEdge = 3 /**< \brief Trigger event upon any edge */
357 
358 /** \brief Trigger request source defined in MODULE_VADC.G[x].QCTRLy.XTSEL(x=0,1,..,11;y=0,1,..,7)
359  */
360 typedef enum
361 {
362  IfxVadc_TriggerSource_0 = 0, /**< \brief Input signal REQTRx_0 */
363  IfxVadc_TriggerSource_1, /**< \brief Input signal REQTRx_1 */
364  IfxVadc_TriggerSource_2, /**< \brief Input signal REQTRx_2 */
365  IfxVadc_TriggerSource_3, /**< \brief Input signal REQTRx_3 */
366  IfxVadc_TriggerSource_4, /**< \brief Input signal REQTRx_4 */
367  IfxVadc_TriggerSource_5, /**< \brief Input signal REQTRx_5 */
368  IfxVadc_TriggerSource_6, /**< \brief Input signal REQTRx_6 */
369  IfxVadc_TriggerSource_7, /**< \brief Input signal REQTRx_7 */
370  IfxVadc_TriggerSource_8, /**< \brief Input signal REQTRx_8 */
371  IfxVadc_TriggerSource_9, /**< \brief Input signal REQTRx_9 */
372  IfxVadc_TriggerSource_10, /**< \brief Input signal REQTRx_10 */
373  IfxVadc_TriggerSource_11, /**< \brief Input signal REQTRx_11 */
374  IfxVadc_TriggerSource_12, /**< \brief Input signal REQTRx_12 */
375  IfxVadc_TriggerSource_13, /**< \brief Input signal REQTRx_13 */
376  IfxVadc_TriggerSource_14, /**< \brief Input signal REQTRx_14 */
377  IfxVadc_TriggerSource_15, /**< \brief Input signal REQTRx_15 */
379 
380 /** \} */
381 
382 /** \addtogroup IfxLld_Vadc_Std_Background_Autoscan
383  * \{ */
384 
385 /******************************************************************************/
386 /*-------------------------Inline Function Prototypes-------------------------*/
387 /******************************************************************************/
388 
389 /** \brief access function to enable/disable wait for read mode for result registers
390  * \param group pointer to the VADC group
391  * \param resultIdx result register index
392  * \param waitForRead wait for read mode enabled/disabled
393  * \return None
394  */
395 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead);
396 
397 /** \brief access function to enable/disable wait for read mode for global result register
398  * \param vadc pointer to the VADC
399  * \param waitForRead wait for read mode enabled/disabled
400  * \return None
401  */
402 IFX_INLINE void IfxVadc_configureWaitForReadModeForGlobalResultRegister(Ifx_VADC *vadc, boolean waitForRead);
403 
404 /** \brief Enables the background sacn external trigger.
405  * \param vadc pointer to the base of VADC registers.
406  * \return None
407  */
409 
410 /** \brief Gets the background scan gating mode.
411  * \param vadc pointer to the base of VADC registers.
412  * \return background scan gating mode.
413  */
415 
416 /** \brief Gets the gating input selection.
417  * \param vadc pointer to the base of VADC registers.
418  * \return background scan gating input selection.
419  */
421 
422 /** \brief Gets the requested background scan slot priority.
423  * \param vadcG pointer to VADC group registers.
424  * \return requested background scan slot priority.
425  */
427 
428 /** \brief Gets the requested background scan slot start mode.
429  * \param vadcG pointer to VADC group registers.
430  * \return requested background scan slot start mode.
431  */
433 
434 /** \brief Gets the background scan trigger input.
435  * \param vadc pointer to the base of VADC registers.
436  * \return Gets the background scan external trigger source.
437  */
439 
440 /** \brief Gets the background scan external trigger mode.
441  * \param vadc pointer to the base of VADC registers.
442  * \return background scan external trigger mode.
443  */
445 
446 /** \brief return conversion result stored in the Global result Register
447  * \param vadc pointer to the VADC module
448  * \return global result register
449  *
450  * \code
451  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
452  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
453  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
454  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
455  * boolean continuous = TRUE; // use continuous background scan
456  *
457  * //confiure wait for read mode for global result register
458  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
459  *
460  * // configure background scan
461  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
462  *
463  * // start the background scan
464  * IfxVadc_startBackgroundScan(vadc, continuous);
465  *
466  * Ifx_VADC_GLOBRES result;
467  * result = IfxVadc_getGlobalResult (vadc);
468  *
469  * \endcode
470  *
471  */
472 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc);
473 
474 /** \brief Get conversion result for the group
475  * \param group pointer to the VADC group
476  * \param results pointer to scaled conversion results
477  * \param resultOffset offset for the first result
478  * \param numResults number of results
479  * \return None
480  *
481  * \code
482  * Ifx_VADC* vadc = &MODULE_VADC
483  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
484  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
485  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
486  * boolean continuous = TRUE; // use continuous autoscan
487  *
488  * //confiure wait for read mode for global result register
489  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
490  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
491  *
492  * // configure autoscan
493  * IfxVadc_setScan(group, channels, mask, continuous);
494  *
495  * // start the autoscan
496  * IfxVadc_startScan(group);
497  *
498  * // wait for conversion to finish
499  *
500  * // fetch the 2 results of conversion for group 0
501  * Ifx_VADC_RES results[10];
502  * result = IfxVadc_getGroupResult(group, results, 0, 2);
503  * \endcode
504  *
505  */
506 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults);
507 
508 /** \brief Get conversion result (Function does not care about the alignment)
509  * value = raw * gain + offset.
510  * \param group pointer to the VADC group
511  * \param resultIdx result register index
512  * \return scaled Conversion result
513  *
514  * \code
515  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
516  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
517  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
518  * boolean continuous = TRUE; // use continuous autoscan
519  *
520  * //confiure wait for read mode for global result register
521  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
522  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
523  *
524  * // configure autoscan
525  * IfxVadc_setScan(group, channels, mask, continuous);
526  *
527  * // start the autoscan
528  * IfxVadc_startScan(group);
529  *
530  * // wait for conversion to finish
531  *
532  * // fetch the result of conversion from result register 0 for group 0
533  * Ifx_VADC_RES result;
534  * result = IfxVadc_getResult(group, IfxVadc_ChannelResult0);
535  * \endcode
536  *
537  */
538 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx);
539 
540 /** \brief Returns the auto background scan status.
541  * \param vadc pointer to the base of VADC registers.
542  * \return TRUE if enabled otherwise FALSE.
543  */
544 IFX_INLINE boolean IfxVadc_isAutoBackgroundScanEnabled(Ifx_VADC *vadc);
545 
546 /** \brief Returns the background scan slot requested status.
547  * \param vadcG pointer to VADC group registers.
548  * \return background scan slot requested status.
549  */
550 IFX_INLINE boolean IfxVadc_isRequestBackgroundScanSlotEnabled(Ifx_VADC_G *vadcG);
551 
552 /** \brief Sets the auto background scan to enable or disable.
553  * \param vadc pointer to the base of VADC registers.
554  * \param autoBackgroundScanEnable whether auto background scan enabled or not.
555  * \return None
556  */
557 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable);
558 
559 /** \brief configures a background scan; can also stop autoscan if all channels are 0
560  * \param vadc pointer to the VADC module registers
561  * \param groupId group index
562  * \param channels specifies the channels which should be enabled/disabled
563  * \param mask specifies the channels which should be modified
564  * \return None
565  *
566  * Background scan can be enabled/disabled for the given channels which are selected with the mask
567  *
568  * \code
569  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
570  * IfxVadc_GroupId groupId = IfxVadc_GroupId0; // for group 0
571  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
572  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
573  * boolean continuous = TRUE; // use continuous background scan
574  *
575  * //confiure wait for read mode for global result register
576  * IfxVadc_configureWaitForReadModeForGlobalResultRegister(vadc, TRUE);
577  *
578  * // configure background scan
579  * IfxVadc_setBackgroundScan(vadc, groupId, channels, mask);
580  *
581  * // start the background scan
582  * IfxVadc_startBackgroundScan(vadc, continuous);
583  * \endcode
584  *
585  */
586 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask);
587 
588 /** \brief Sets the background scan slot gating configurations.
589  * \param vadc pointer to the base of VADC registers.
590  * \param gatingSource gate input for group.
591  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
592  * \return None
593  */
595 
596 /** \brief Sets the background scan exteranal trigger operating configurations.
597  * \param vadc pointer to the base of VADC registers.
598  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
599  * \param triggerSource trigger input for group.
600  * \return None
601  */
603 
604 /** \brief Starts a background scan in either continuous or single shot conversion mode as per the parameter
605  * \param vadc pointer to the VADC module
606  * \param continuous Starts a background scan in either continuous or single shot conversion mode as per the parameter
607  * \return None
608  *
609  * \code
610  * Ifx_VADC* vadc = &MODULE_VADC; // module pointer
611  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
612  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
613  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
614  * boolean continuous = TRUE; // use continuous background scan
615  *
616  * // configure background scan
617  * IfxVadc_setBackgroundScan(vadc, group, channels, mask);
618  *
619  * // start the background scan
620  * IfxVadc_startBackgroundScan(vadc, continuous);
621  * \endcode
622  *
623  */
624 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc, boolean continuous);
625 
626 /******************************************************************************/
627 /*-------------------------Global Function Prototypes-------------------------*/
628 /******************************************************************************/
629 
630 /** \brief Gives the background scan status for a group
631  * \param vadc pointer to the VADC module
632  * \return IfxVadc_Status
633  */
635 
636 /** \brief Get conversion result (Function does not care about the alignment)
637  * value = raw * gain + offset.
638  * \param vadc VADC module pointer
639  * \param group pointer to the VADC group
640  * \param channel channel Id
641  * \param sourceType type of request source
642  * \return scaled Conversion result
643  *
644  * \code
645  * Ifx_VADC vadc;
646  * vadc.vadc = &MODULE_VADC;
647  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
648  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
649  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
650  * boolean continuous = FALSE; //not using continuous autoscan
651  *
652  * //confiure wait for read mode for global result register
653  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult0, TRUE);
654  * IfxVadc_configureWaitForReadMode(group,IfxVadc_ChannelResult1, TRUE);
655  *
656  * // configure autoscan
657  * IfxVadc_setScan(group, channels, mask, continuous);
658  *
659  * // start the autoscan
660  * IfxVadc_startScan(group);
661  *
662  * // wait for conversion to finish
663  *
664  * // fetch the result of conversion for channel 2 of group 0
665  * Ifx_VADC_RESresult2;
666  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId2, IfxVadc_RequestSource_scan);
667  * Ifx_VADC_RESresult5;
668  * result = IfxVadc_getResultBasedOnRequestSource(&vadc, group, IfxVadc_ChannelId5, IfxVadc_RequestSource_scan);
669  * \endcode
670  *
671  */
672 IFX_EXTERN Ifx_VADC_RES IfxVadc_getResultBasedOnRequestSource(Ifx_VADC *vadc, Ifx_VADC_G *group, IfxVadc_ChannelId channel, IfxVadc_RequestSource sourceType);
673 
674 /** \} */
675 
676 /** \addtogroup IfxLld_Vadc_Std_ChannelScan
677  * \{ */
678 
679 /******************************************************************************/
680 /*-------------------------Inline Function Prototypes-------------------------*/
681 /******************************************************************************/
682 
683 /** \brief Disables the scan slot external trigger.
684  * \param vadcG pointer to VADC group registers.
685  * \return None
686  */
687 IFX_INLINE void IfxVadc_disableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
688 
689 /** \brief Enables the scan slot external trigger.
690  * \param vadcG pointer to VADC group registers.
691  * \return None
692  */
693 IFX_INLINE void IfxVadc_enableScanSlotExternalTrigger(Ifx_VADC_G *vadcG);
694 
695 /** \brief Gets the request scan slot gating mode.
696  * \param vadcG pointer to VADC group registers.
697  * \return requested scan slot gating mode.
698  */
700 
701 /** \brief Gets the request scan slot gating input.
702  * \param vadcG pointer to VADC group registers.
703  * \return request scan slot gating input.
704  */
706 
707 /** \brief Gets the request scan slot priority.
708  * \param vadcG pointer to VADC group registers.
709  * \return request scan slot priority.
710  */
712 
713 /** \brief Gets the request scan slot start mode.
714  * \param vadcG pointer to VADC group registers.
715  * \return request scan slot start mode.
716  */
718 
719 /** \brief Gets the requested scan slot trigger input.
720  * \param vadcG pointer to VADC group registers.
721  * \return requested scan slot trigger input.
722  */
724 
725 /** \brief Gets the requested scan slot trigger mode.
726  * \param vadcG pointer to VADC group registers.
727  * \return requested scan slot trigger mode.
728  */
730 
731 /** \brief Gets the auto scan enable status.
732  * \param vadcG pointer to VADC group registers.
733  * \return TRUE if auto scan enabled otherwise FALSE.
734  */
735 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG);
736 
737 /** \brief Returns the scan slot requested status.
738  * \param vadcG pointer to VADC group registers.
739  * \return TRUE if scan slot request enabled otherwise FALSE.
740  */
741 IFX_INLINE boolean IfxVadc_isRequestScanSlotEnabled(Ifx_VADC_G *vadcG);
742 
743 /** \brief Sets the autosacn bit enable or disable.
744  * \param vadcG pointer to VADC group registers.
745  * \param autoscanEnable whether autoscan is enabled or not.
746  * \return None
747  */
748 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable);
749 
750 /** \brief Sets the scan slot gating configuration.
751  * \param vadcG pointer to VADC group registers.
752  * \param gatingSource gate input for group.
753  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
754  * \return None
755  */
756 IFX_INLINE void IfxVadc_setScanSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
757 
758 /** \brief Sets the scan slot trigger operating configurations.
759  * \param vadcG pointer to VADC group registers.
760  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
761  * \param triggerSource trigger input for group.
762  * \return None
763  */
764 IFX_INLINE void IfxVadc_setScanSlotTriggerConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
765 
766 /** \brief Starts an autoscan on the specified group
767  * \param group pointer to the VADC group
768  * \return None
769  *
770  * \code
771  *
772  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
773  * IfxVadc_ChannelId channel = 1; // for channel 1
774  *
775  * // Add channel 1 to queue of group 0 with the refill turned on
776  * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
777  * \endcode
778  *
779  */
780 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group);
781 
782 /******************************************************************************/
783 /*-------------------------Global Function Prototypes-------------------------*/
784 /******************************************************************************/
785 
786 /** \brief Gives the scan status for a group
787  * \param group pointer to the VADC group
788  * \return IfxVadc_Status
789  */
791 
792 /** \brief Configures an (auto-)scan
793  * \param group pointer to the VADC group
794  * \param channels specifies the channels which should be enabled/disabled
795  * \param mask specifies the channels which should be modified
796  * \param continuous specifies if single triggered or continuous autoscan
797  * \return None
798  *
799  * (Auto-)scan can be enabled/disabled for the given channels which are selected with the mask
800  *
801  * \code
802  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
803  * uint32 channels = (1 << 5) | (1 << 2); // enable channel #5 and #2
804  * uint32 mask = (1 << 7) | (1 << 5) | (1 << 2); // modify the selection for channel #7, #5 and #2; channel #7 will be disabled
805  * boolean continuous = TRUE; // use continuous autoscan
806  *
807  * // configure autoscan
808  * IfxVadc_setScan(group, channels, mask, continuous);
809  *
810  * // start the autoscan
811  * IfxVadc_startScan(group);
812  * \endcode
813  *
814  */
815 IFX_EXTERN void IfxVadc_setScan(Ifx_VADC_G *group, uint32 channels, uint32 mask, boolean continuous);
816 
817 /** \} */
818 
819 /** \addtogroup IfxLld_Vadc_Std_QueueRequest
820  * \{ */
821 
822 /******************************************************************************/
823 /*-------------------------Inline Function Prototypes-------------------------*/
824 /******************************************************************************/
825 
826 /** \brief Add an entry to the queue of a group for the specified channel with the following options set:
827  * refill incase of aborted conversion
828  * source interrupt enable/disable
829  * external trigger control of the aborted conversion
830  * \param group pointer to the VADC group
831  * \param channel specifies channel Id
832  * \param options specifies the refill, source interrupt enable/disable and external trigger control selection
833  * \return None
834  *
835  * \code
836  *
837  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
838  * IfxVadc_ChannelId channel = 1; // for channel 1
839  * // Add channel 1 to queue of group 0 with the refill turned on
840  * IfxVadc_addToQueue(qroup, channel, (1<<IFX_VADC_G_QBUR0_RF_OFF));
841  * \endcode
842  *
843  */
844 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options);
845 
846 /** \brief Clears all the queue entries including backup stage.
847  * \param vadcG pointer to VADC group registers.
848  * \param flushQueue Whether queue is cleared or not.
849  * \return None
850  */
851 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue);
852 
853 /** \brief Disables the external trigger.
854  * \param vadcG pointer to VADC group registers.
855  * \return None
856  */
858 
859 /** \brief Enables the external trigger.
860  * \param vadcG pointer to VADC group registers.
861  * \return None
862  */
863 IFX_INLINE void IfxVadc_enableQueueSlotExternalTrigger(Ifx_VADC_G *vadcG);
864 
865 /** \brief Gets the requested queue slot gating mode.
866  * \param vadcG pointer to VADC group registers.
867  * \return requested queue slot gating mode.
868  */
870 
871 /** \brief Gets the requested queue slot gating input.
872  * \param vadcG pointer to VADC group registers.
873  * \return requested queue slot gating input.
874  */
876 
877 /** \brief Gets the request queue slot priority.
878  * \param vadcG pointer to VADC group registers.
879  * \return requested queue slot priority.
880  */
882 
883 /** \brief Gets the requested queue slot start mode.
884  * \param vadcG pointer to VADC group registers.
885  * \return requested queue slot start mode.
886  */
888 
889 /** \brief Gets the requested queue slot trigger input.
890  * \param vadcG pointer to VADC group registers.
891  * \return requested queue slot trigger input.
892  */
894 
895 /** \brief Gets the requested queue slot trigger mode.
896  * \param vadcG pointer to VADC group registers.
897  * \return requested queue slot trigger mode.
898  */
900 
901 /** \brief Returns the queue slot requested status.
902  * \param vadcG pointer to VADC group registers.
903  * \return TRUE if queue slot request enabled otherwise FALSE.
904  */
905 IFX_INLINE boolean IfxVadc_isRequestQueueSlotEnabled(Ifx_VADC_G *vadcG);
906 
907 /** \brief Sets the gating configurations.
908  * \param vadcG pointer to VADC group registers.
909  * \param gatingSource gate input for group.
910  * \param gatingMode gating mode. High level, Low Level or Gating disabled.
911  * \return None
912  */
913 IFX_INLINE void IfxVadc_setQueueSlotGatingConfig(Ifx_VADC_G *vadcG, IfxVadc_GatingSource gatingSource, IfxVadc_GatingMode gatingMode);
914 
915 /** \brief Sets the trigger operating configurations.
916  * \param vadcG pointer to VADC group registers.
917  * \param triggerMode trigger mode. Rising, falling any edge leads to an trigger event.
918  * \param triggerSource trigger input for group.
919  * \return None
920  */
921 IFX_INLINE void IfxVadc_setQueueSlotTriggerOperatingConfig(Ifx_VADC_G *vadcG, IfxVadc_TriggerMode triggerMode, IfxVadc_TriggerSource triggerSource);
922 
923 /** \brief Starts a queue of a group by generating a trigger event through software
924  * \param group pointer to the VADC group
925  * \return None
926  */
927 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group);
928 
929 /******************************************************************************/
930 /*-------------------------Global Function Prototypes-------------------------*/
931 /******************************************************************************/
932 
933 /** \brief Gives the status of the Queue of a group by returning non zero value if the Queue is full
934  * \param group pointer to the VADC group
935  * \return status of the Queue
936  *
937  * \code
938  * Ifx_VADC_G* group = &MODULE_VADC.G[0]; // for group 0
939  * boolean queueFull = (IfxVadc_getQueueStatus(group)==IfxVadc_Status_queueFull)?TRUE:FALSE; // get Queue status for group 0
940  * \endcode
941  *
942  */
944 
945 /** \} */
946 
947 /** \addtogroup IfxLld_Vadc_Std_IO
948  * \{ */
949 
950 /******************************************************************************/
951 /*-------------------------Inline Function Prototypes-------------------------*/
952 /******************************************************************************/
953 
954 /** \brief Initializes a EMUX output
955  * \param emux the Emux Pin which should be configured
956  * \param outputMode the pin output mode which should be configured
957  * \param padDriver the pad driver mode which should be configured
958  * \return None
959  */
961 
962 /** \brief Initializes a GxBFL output
963  * \param gxBfl the GxBFL Pin which should be configured
964  * \param outputMode the pin output mode which should be configured
965  * \param padDriver the pad driver mode which should be configured
966  * \return None
967  */
969 
970 /** \} */
971 
972 /** \addtogroup IfxLld_Vadc_Std_Frequency
973  * \{ */
974 
975 /******************************************************************************/
976 /*-------------------------Inline Function Prototypes-------------------------*/
977 /******************************************************************************/
978 
979 /** \brief Calculate the time ticks using analog frequency.
980  * \param analogFrequency analog frequency.
981  * \param sampleTime sample time.
982  * \return sample time in ticks.
983  */
985 
986 /******************************************************************************/
987 /*-------------------------Global Function Prototypes-------------------------*/
988 /******************************************************************************/
989 
990 /** \brief Returns the configured Fadci VADC analog clock frequency in Hz.
991  * \param vadc pointer to the base of VADC registers
992  * \return Returns the configured Fadci VADC analog clock frequency in Hz.
993  */
995 
996 /** \brief Returns the configured Fadcd VADC digital clock frequency in Hz.
997  * \param vadc pointer to the base of VADC registers
998  * \return Returns the configured Fadcd VADC digital clock frequency in Hz.
999  */
1001 
1002 /** \} */
1003 
1004 /** \addtogroup IfxLld_Vadc_Std_Group
1005  * \{ */
1006 
1007 /******************************************************************************/
1008 /*-------------------------Inline Function Prototypes-------------------------*/
1009 /******************************************************************************/
1010 
1011 /** \brief Clears the all group requests.
1012  * \param vadcG pointer to VADC group registers.
1013  * \return None
1014  */
1015 IFX_INLINE void IfxVadc_clearAllResultRequests(Ifx_VADC_G *vadcG);
1016 
1017 /** \brief Gets the ADC group arbitration round length.
1018  * \param vadcG pointer to VADC group registers.
1019  * \return ADC group arbitration round length.
1020  */
1022 
1023 /** \brief Gets the channel esult service request node pointer 0.
1024  * \param vadcG pointer to VADC group registers.
1025  * \return channel result service request node pointer 0.
1026  */
1027 IFX_INLINE Ifx_VADC_G_REVNP0 IfxVadc_getChannelResultServiceRequestNodePointer0(Ifx_VADC_G *vadcG);
1028 
1029 /** \brief Gets the channel esult service request node pointer 1.
1030  * \param vadcG pointer to VADC group registers.
1031  * \return channel result service request node pointer 1.
1032  */
1033 IFX_INLINE Ifx_VADC_G_REVNP1 IfxVadc_getChannelResultServiceRequestNodePointer1(Ifx_VADC_G *vadcG);
1034 
1035 /** \brief Gets the channel service request node pointer.
1036  * \param vadcG pointer to VADC group registers.
1037  * \return channel service request node pointer.
1038  */
1039 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer(Ifx_VADC_G *vadcG);
1040 
1041 /** \brief Gets the configured master index.
1042  * \param vadcG pointer to VADC group registers.
1043  * \return configured master kernel index.
1044  */
1045 IFX_INLINE uint8 IfxVadc_getMasterIndex(Ifx_VADC_G *vadcG);
1046 
1047 /** \brief Resets the ADC group.
1048  * \param vadcG pointer to VADC group registers.
1049  * \return None
1050  */
1051 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG);
1052 
1053 /** \brief Sets analog converter group number.
1054  * \param vadcG pointer to VADC group registers.
1055  * \param analogConverterMode group analog converter mode.
1056  * \return None
1057  */
1058 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode);
1059 
1060 /** \brief Sets the arbiter round length.
1061  * \param vadcG pointer to VADC group registers.
1062  * \param arbiterRoundLength arbiter round length.
1063  * \return None
1064  */
1065 IFX_INLINE void IfxVadc_setArbitrationRoundLength(Ifx_VADC_G *vadcG, IfxVadc_ArbitrationRounds arbiterRoundLength);
1066 
1067 /** \brief Sets the ADC input class channel resolution.
1068  * \param vadcG pointer to VADC group registers.
1069  * \param inputClassNum input class number.
1070  * \param resolution ADC input class channel resolution.
1071  * \return None
1072  */
1073 IFX_INLINE void IfxVadc_setInputClassResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution);
1074 
1075 /** \brief Sets the ADC input class sample time ticks.
1076  * \param vadcG pointer to VADC group registers.
1077  * \param inputClassNum input class number.
1078  * \param analogFrequency ADC analog frequency.
1079  * \param sampleTime request sample time for input class.
1080  * \return None
1081  */
1082 IFX_INLINE void IfxVadc_setInputClassSampleTimeTicks(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime);
1083 
1084 /** \brief Sets the master index.
1085  * \param vadcG pointer to VADC group registers.
1086  * \param masterIndex master index.
1087  * \return None
1088  */
1089 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex);
1090 
1091 /******************************************************************************/
1092 /*-------------------------Global Function Prototypes-------------------------*/
1093 /******************************************************************************/
1094 
1095 /** \brief Sets the Arbiter slot configurations.
1096  * \param vadcG pointer to VADC group registers.
1097  * \param slotEnable enable/disable of slot.
1098  * \param prio channel request priority.
1099  * \param mode Channel Slot start mode.
1100  * \param slot channel slot Request source.
1101  * \return None
1102  */
1104 
1105 /** \} */
1106 
1107 /** \addtogroup IfxLld_Vadc_Std_Module
1108  * \{ */
1109 
1110 /******************************************************************************/
1111 /*-------------------------Inline Function Prototypes-------------------------*/
1112 /******************************************************************************/
1113 
1114 /** \brief Enable VADC kernel.
1115  * \param vadc pointer to the base of VADC registers.
1116  * \return None
1117  */
1118 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc);
1119 
1120 /** \brief gets ADC Calibration Flag CAL status.
1121  * \param vadc pointer to VADC group registers.
1122  * \param adcCalGroupNum ADC CAL group number.
1123  * \return CAL group status.
1124  */
1125 IFX_INLINE uint8 IfxVadc_getAdcCalibrationActiveState(Ifx_VADC *vadc, uint8 adcCalGroupNum);
1126 
1127 /** \brief Gets the global control configuration value.
1128  * \param vadc pointer to the base of VADC registers.
1129  * \return global control configuration value.
1130  */
1131 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc);
1132 
1133 /** \brief initiates the calibration pulse phase.
1134  * \param vadc pointer to the base of VADC registers
1135  * \return None
1136  */
1137 IFX_INLINE void IfxVadc_initiateStartupCalibration(Ifx_VADC *vadc);
1138 
1139 /** \brief Sets the channel conversion mode.
1140  * \param vadc pointer to VADC module registers.
1141  * \param groupInputClassNum group input class number.
1142  * \param resolution ADC channel resolution.
1143  * \return None
1144  */
1145 IFX_INLINE void IfxVadc_setChannelResolution(Ifx_VADC *vadc, uint8 groupInputClassNum, IfxVadc_ChannelResolution resolution);
1146 
1147 /** \brief Sets the sample time ticks of ADC group class.
1148  * \param vadc pointer to VADC module registers.
1149  * \param groupInputClassNum group input class number.
1150  * \param analogFrequency ADC analog frequency.
1151  * \param sampleTime the requested sample time for input class.
1152  * \return None
1153  */
1154 IFX_INLINE void IfxVadc_setSampleTimeTicks(Ifx_VADC *vadc, uint8 groupInputClassNum, float32 analogFrequency, float32 sampleTime);
1155 
1156 /******************************************************************************/
1157 /*-------------------------Global Function Prototypes-------------------------*/
1158 /******************************************************************************/
1159 
1160 /** \brief Disable write access to the VADC config/control registers.
1161  * \param vadc pointer to the base of VADC registers.
1162  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be disabled.
1163  * \return None
1164  */
1165 IFX_EXTERN void IfxVadc_disableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1166 
1167 /** \brief Disables the post calibration.
1168  * \param vadc pointer to the base of VADC registers.
1169  * \param group Index of the group.
1170  * \param disable disable or not.
1171  * \return None
1172  */
1173 IFX_EXTERN void IfxVadc_disablePostCalibration(Ifx_VADC *vadc, IfxVadc_GroupId group, boolean disable);
1174 
1175 /** \brief Enable write access to the VADC config/control registers.
1176  * \param vadc pointer to the base of VADC registers.
1177  * \param protectionSet Index of the bit in the ACCPROTx {x=0/1} for which write access is to be enabled.
1178  * \return None
1179  */
1180 IFX_EXTERN void IfxVadc_enableAccess(Ifx_VADC *vadc, IfxVadc_Protection protectionSet);
1181 
1182 /** \brief Gives the SRC source address.
1183  * \param group Index of the group
1184  * \param index SRC number
1185  * \return SRC source address
1186  */
1187 IFX_EXTERN volatile Ifx_SRC_SRCR *IfxVadc_getSrcAddress(IfxVadc_GroupId group, IfxVadc_SrcNr index);
1188 
1189 /** \brief Initialises the ADC Arbiter clock.
1190  * \param vadc pointer to the base of VADC registers
1191  * \param arbiterClockDivider ADC arbiter clock divider.
1192  * \return None
1193  */
1194 IFX_EXTERN void IfxVadc_initialiseAdcArbiterClock(Ifx_VADC *vadc, uint32 arbiterClockDivider);
1195 
1196 /** \brief Initialises ADC converter clock.
1197  * \param vadc pointer to the base of VADC registers
1198  * \param converterClockDivider ADC converter clock divider.
1199  * \return None
1200  */
1201 IFX_EXTERN void IfxVadc_initialiseAdcConverterClock(Ifx_VADC *vadc, uint32 converterClockDivider);
1202 
1203 /** \brief Configure the FadcD vadc digital clock.
1204  * \param vadc pointer to the base of VADC registers.
1205  * \param fAdcD ADC digital clock frequency in Hz.
1206  * \return calculated ADC digital clock frequency in Hz.
1207  */
1208 IFX_EXTERN uint32 IfxVadc_initializeFAdcD(Ifx_VADC *vadc, uint32 fAdcD);
1209 
1210 /** \brief Configure the ADC analog clock.
1211  * \param vadc pointer to the base of VADC registers.
1212  * \param fAdcI ADC analog clock clock frequency in Hz. Range = [5000000, 10000000].
1213  * \return ADC analog clock frequency in Hz.
1214  */
1215 IFX_EXTERN uint32 IfxVadc_initializeFAdcI(Ifx_VADC *vadc, uint32 fAdcI);
1216 
1217 /** \brief Resets the kernel.
1218  * \param vadc pointer to the base of VADC registers.
1219  * \return None
1220  */
1221 IFX_EXTERN void IfxVadc_resetKernel(Ifx_VADC *vadc);
1222 
1223 /** \brief Starts ADC calibration and wait for the end of the calibration process.
1224  * \param vadc pointer to the base of VADC registers.
1225  * \return None
1226  */
1227 IFX_EXTERN void IfxVadc_startupCalibration(Ifx_VADC *vadc);
1228 
1229 /** \} */
1230 
1231 /** \addtogroup IfxLld_Vadc_Std_Channel
1232  * \{ */
1233 
1234 /******************************************************************************/
1235 /*-------------------------Inline Function Prototypes-------------------------*/
1236 /******************************************************************************/
1237 
1238 /** \brief Clears the channel request.
1239  * \param vadcG pointer to VADC group registers.
1240  * \param channelId channel id whose request to be cleared.
1241  * \return None
1242  */
1243 IFX_INLINE void IfxVadc_clearChannelRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelId);
1244 
1245 /** \brief Enables the FIFO mode.
1246  * \param vadcG pointer to VADC group registers.
1247  * \param resultRegister channel result register.
1248  * \return None
1249  */
1250 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister);
1251 
1252 /** \brief Gets the group's assigned channels.
1253  * \param vadcG pointer to VADC group registers.
1254  * \return group's assigned channels.
1255  */
1256 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG);
1257 
1258 /** \brief Gets the current ADC channel control configurations.
1259  * \param vadcG pointer to VADC group registers.
1260  * \param channelIndex ADC channel number.
1261  * \return current ADC channel control configuration.
1262  */
1263 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1264 
1265 /** \brief Gets the ADC input class channel resolution.
1266  * \param vadcG pointer to VADC group registers.
1267  * \param inputClassNum ADC input class number.
1268  * \return ADC input class channel resolution.
1269  */
1271 
1272 /** \brief Gets the ADC input class channel sample time.
1273  * \param vadcG pointer to VADC group registers.
1274  * \param inputClassNum ADC input class number.
1275  * \param analogFrequency ADC module analog frequency.
1276  * \return ADC input class channel sample time.
1277  */
1278 IFX_INLINE float32 IfxVadc_getChannelSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency);
1279 
1280 /** \brief Sets the channels with low priority as background channel.
1281  * \param vadcG pointer to VADC group registers.
1282  * \param channelIndex group channel id.
1283  * \return None
1284  */
1285 IFX_INLINE void IfxVadc_setBackgroundPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1286 
1287 /** \brief Sets the target for result background source.
1288  * \param vadcG pointer to VADC group registers.
1289  * \param channelIndex group channel id.
1290  * \param globalResultUsage whether storage in global result register.
1291  * \return None
1292  */
1293 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage);
1294 
1295 /** \brief Selects boundary extension.
1296  * \param vadcG pointer to VADC group registers.
1297  * \param channelIndex group channel id.
1298  * \param boundaryMode boundary extension mode.
1299  * \return None
1300  */
1301 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode);
1302 
1303 /** \brief Sets the channel event service request line.
1304  * \param vadcG pointer to VADC group registers.
1305  * \param channelSrcNr channel event Service Node.
1306  * \param channel channel number.
1307  * \return None
1308  */
1309 IFX_INLINE void IfxVadc_setChannelEventSourceLine(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel);
1310 
1311 /** \brief Sets the channel event mode.
1312  * \param vadcG pointer to VADC group registers.
1313  * \param channelIndex group channel id.
1314  * \param limitCheck channel event mode.
1315  * \return None
1316  */
1317 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck);
1318 
1319 /** \brief Sets channel as priority channel with in the group.
1320  * \param vadcG pointer to VADC group registers.
1321  * \param channelIndex group channel id.
1322  * \return None
1323  */
1324 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex);
1325 
1326 /** \brief Sets the channel input class.
1327  * \param vadcG pointer to VADC group registers.
1328  * \param channelIndex group channel id.
1329  * \param inputClass group input class.
1330  * \return None
1331  */
1332 IFX_INLINE void IfxVadc_setInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass);
1333 
1334 /** \brief Sets group's lower boundary.
1335  * \param vadcG pointer to VADC group registers.
1336  * \param channelIndex group channel id.
1337  * \param lowerBoundary group lower boundary.
1338  * \return None
1339  */
1340 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary);
1341 
1342 /** \brief Selects the refernce input.
1343  * \param vadcG pointer to VADC group registers.
1344  * \param channelIndex group channel id.
1345  * \param reference reference input.
1346  * \return None
1347  */
1348 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference);
1349 
1350 /** \brief Sets result event node pointer 0.
1351  * \param vadcG pointer to VADC group registers.
1352  * \param resultSrcNr channel result event service node.
1353  * \param resultRegister channel result register.
1354  * \return None
1355  */
1356 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1357 
1358 /** \brief Sets result event node pointer 1.
1359  * \param vadcG pointer to VADC group registers.
1360  * \param resultSrcNr channel result event service node.
1361  * \param resultRegister channel result register.
1362  * \return None
1363  */
1364 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister);
1365 
1366 /** \brief Sets result store position.
1367  * \param vadcG pointer to VADC group registers.
1368  * \param channelIndex group channel id.
1369  * \param rightAlignedStorage result store position.
1370  * \return None
1371  */
1372 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage);
1373 
1374 /** \brief Sets channel synchronization request.
1375  * \param vadcG pointer to VADC group registers.
1376  * \param channelIndex group channel id.
1377  * \param synchonize whether channel synchronize or stand alone operation.
1378  * \return None
1379  */
1380 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize);
1381 
1382 /** \brief Sets group's upper boundary.
1383  * \param vadcG pointer to VADC group registers.
1384  * \param channelIndex group channel id.
1385  * \param upperBoundary group upper boundary.
1386  * \return None
1387  */
1388 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary);
1389 
1390 /** \brief Sets the group result register.
1391  * \param vadcG pointer to VADC group registers.
1392  * \param channelIndex group channel id.
1393  * \param resultRegister result register for group result storage.
1394  * \return None
1395  */
1396 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister);
1397 
1398 /** \} */
1399 
1400 /******************************************************************************/
1401 /*---------------------Inline Function Implementations------------------------*/
1402 /******************************************************************************/
1403 
1404 IFX_INLINE void IfxVadc_configureWaitForReadMode(Ifx_VADC_G *group, uint32 resultIdx, boolean waitForRead)
1405 {
1406  group->RCR[resultIdx].B.WFR = waitForRead;
1407 }
1408 
1409 
1411 {
1412  vadc->GLOBRCR.B.WFR = waitForRead;
1413 }
1414 
1415 
1417 {
1418  vadc->BRSMR.B.ENTR = 1; /* enable external trigger */
1419 }
1420 
1421 
1423 {
1424  return (IfxVadc_GatingMode)vadc->BRSMR.B.ENGT;
1425 }
1426 
1427 
1429 {
1430  return (IfxVadc_GatingSource)vadc->BRSCTRL.B.GTSEL;
1431 }
1432 
1433 
1435 {
1436  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO2;
1437 }
1438 
1439 
1441 {
1442  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM2;
1443 }
1444 
1445 
1447 {
1448  return (IfxVadc_TriggerSource)vadc->BRSCTRL.B.XTSEL;
1449 }
1450 
1451 
1453 {
1454  return (IfxVadc_TriggerMode)vadc->BRSCTRL.B.XTMODE;
1455 }
1456 
1457 
1458 IFX_INLINE Ifx_VADC_GLOBRES IfxVadc_getGlobalResult(Ifx_VADC *vadc)
1459 {
1460  Ifx_VADC_GLOBRES tmpGlobalResult;
1461 
1462  tmpGlobalResult.U = vadc->GLOBRES.U;
1463 
1464  return tmpGlobalResult;
1465 }
1466 
1467 
1468 IFX_INLINE void IfxVadc_getGroupResult(Ifx_VADC_G *group, Ifx_VADC_RES *results, uint32 resultOffset, uint32 numResults)
1469 {
1470  uint32 idx;
1471 
1472  for (idx = 0; idx < numResults; idx++)
1473  {
1474  results[idx].U = group->RES[resultOffset + idx].U;
1475  }
1476 }
1477 
1478 
1479 IFX_INLINE Ifx_VADC_RES IfxVadc_getResult(Ifx_VADC_G *group, uint32 resultIdx)
1480 {
1481  Ifx_VADC_RES tmpResult;
1482 
1483  tmpResult.U = group->RES[resultIdx].U;
1484 
1485  return tmpResult;
1486 }
1487 
1488 
1490 {
1491  return (boolean)vadc->BRSMR.B.SCAN;
1492 }
1493 
1494 
1496 {
1497  return (boolean)vadcG->ARBPR.B.ASEN2;
1498 }
1499 
1500 
1501 IFX_INLINE void IfxVadc_setAutoBackgroundScan(Ifx_VADC *vadc, boolean autoBackgroundScanEnable)
1502 {
1503  vadc->BRSMR.B.SCAN = autoBackgroundScanEnable;
1504 }
1505 
1506 
1507 IFX_INLINE void IfxVadc_setBackgroundScan(Ifx_VADC *vadc, IfxVadc_GroupId groupId, uint32 channels, uint32 mask)
1508 {
1509  channels = (vadc->BRSSEL[groupId].U & ~mask) | channels;
1510  vadc->BRSSEL[groupId].U = channels;
1511 }
1512 
1513 
1515 {
1516  Ifx_VADC_BRSCTRL brsctrl;
1517  brsctrl.U = vadc->BRSCTRL.U;
1518  brsctrl.B.GTWC = 1;
1519  brsctrl.B.GTSEL = gatingSource;
1520  vadc->BRSCTRL.U = brsctrl.U;
1521  vadc->BRSMR.B.ENGT = gatingMode;
1522 }
1523 
1524 
1526 {
1527  Ifx_VADC_BRSCTRL brsctrl;
1528  brsctrl.U = vadc->BRSCTRL.U;
1529  brsctrl.B.XTWC = 1;
1530  brsctrl.B.XTMODE = triggerMode;
1531  brsctrl.B.XTSEL = triggerSource;
1532  vadc->BRSCTRL.U = brsctrl.U;
1533 }
1534 
1535 
1536 IFX_INLINE void IfxVadc_startBackgroundScan(Ifx_VADC *vadc, boolean continuous)
1537 {
1538  vadc->BRSMR.B.LDEV = 1; /* execute Load event to start the conversion */
1539 }
1540 
1541 
1543 {
1544  vadcG->ASMR.B.ENTR = 0; /* disable external trigger */
1545 }
1546 
1547 
1549 {
1550  vadcG->ASMR.B.ENTR = 1; /* enable external trigger */
1551 }
1552 
1553 
1555 {
1556  return (IfxVadc_GatingMode)vadcG->ASMR.B.ENGT;
1557 }
1558 
1559 
1561 {
1562  return (IfxVadc_GatingSource)vadcG->ASCTRL.B.GTSEL;
1563 }
1564 
1565 
1567 {
1568  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO1;
1569 }
1570 
1571 
1573 {
1574  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM1;
1575 }
1576 
1577 
1579 {
1580  return (IfxVadc_TriggerSource)vadcG->ASCTRL.B.XTSEL;
1581 }
1582 
1583 
1585 {
1586  return (IfxVadc_TriggerMode)vadcG->ASCTRL.B.XTMODE;
1587 }
1588 
1589 
1590 IFX_INLINE boolean IfxVadc_isAutoScanEnabled(Ifx_VADC_G *vadcG)
1591 {
1592  return (boolean)vadcG->ASMR.B.SCAN;
1593 }
1594 
1595 
1597 {
1598  return (boolean)vadcG->ARBPR.B.ASEN1;
1599 }
1600 
1601 
1602 IFX_INLINE void IfxVadc_setAutoScan(Ifx_VADC_G *vadcG, boolean autoscanEnable)
1603 {
1604  vadcG->ASMR.B.SCAN = autoscanEnable;
1605 }
1606 
1607 
1609 {
1610  Ifx_VADC_G_ASCTRL asctrl;
1611  asctrl.U = vadcG->ASCTRL.U;
1612  asctrl.B.GTWC = 1;
1613  asctrl.B.GTSEL = gatingSource;
1614  vadcG->ASCTRL.U = asctrl.U;
1615  vadcG->ASMR.B.ENGT = gatingMode;
1616 }
1617 
1618 
1620 {
1621  Ifx_VADC_G_ASCTRL asctrl;
1622  asctrl.U = vadcG->ASCTRL.U;
1623  asctrl.B.XTWC = 1;
1624  asctrl.B.XTMODE = triggerMode;
1625  asctrl.B.XTSEL = triggerSource;
1626  vadcG->ASCTRL.U = asctrl.U;
1627 }
1628 
1629 
1630 IFX_INLINE void IfxVadc_startScan(Ifx_VADC_G *group)
1631 {
1632  group->ASMR.B.LDEV = 1; /* set Load event. Channels stored in ASSEL will be copied into pending register and conversion will start */
1633 }
1634 
1635 
1636 IFX_INLINE void IfxVadc_addToQueue(Ifx_VADC_G *group, IfxVadc_ChannelId channel, uint32 options)
1637 {
1638  group->QINR0.U = channel | options;
1639 }
1640 
1641 
1642 IFX_INLINE void IfxVadc_clearQueue(Ifx_VADC_G *vadcG, boolean flushQueue)
1643 {
1644  vadcG->QMR0.B.FLUSH = flushQueue;
1645 }
1646 
1647 
1649 {
1650  vadcG->QMR0.B.ENTR = 0; /* disable external trigger */
1651 }
1652 
1653 
1655 {
1656  vadcG->QMR0.B.ENTR = 1; /* enable external trigger */
1657 }
1658 
1659 
1661 {
1662  return (IfxVadc_GatingMode)vadcG->QMR0.B.ENGT;
1663 }
1664 
1665 
1667 {
1668  return (IfxVadc_GatingSource)vadcG->QCTRL0.B.GTSEL;
1669 }
1670 
1671 
1673 {
1674  return (IfxVadc_RequestSlotPriority)vadcG->ARBPR.B.PRIO0;
1675 }
1676 
1677 
1679 {
1680  return (IfxVadc_RequestSlotStartMode)vadcG->ARBPR.B.CSM0;
1681 }
1682 
1683 
1685 {
1686  return (IfxVadc_TriggerSource)vadcG->QCTRL0.B.XTSEL;
1687 }
1688 
1689 
1691 {
1692  return (IfxVadc_TriggerMode)vadcG->QCTRL0.B.XTMODE;
1693 }
1694 
1695 
1697 {
1698  return (boolean)vadcG->ARBPR.B.ASEN0;
1699 }
1700 
1701 
1703 {
1704  Ifx_VADC_G_QCTRL0 qctrl0;
1705  qctrl0.U = vadcG->QCTRL0.U;
1706  qctrl0.B.GTWC = 1;
1707  qctrl0.B.GTSEL = gatingSource;
1708  vadcG->QCTRL0.U = qctrl0.U;
1709  vadcG->QMR0.B.ENGT = gatingMode;
1710 }
1711 
1712 
1714 {
1715  Ifx_VADC_G_QCTRL0 qctrl0;
1716  qctrl0.U = vadcG->QCTRL0.U;
1717  qctrl0.B.XTWC = 1;
1718  qctrl0.B.XTMODE = triggerMode;
1719  qctrl0.B.XTSEL = triggerSource;
1720  vadcG->QCTRL0.U = qctrl0.U;
1721 }
1722 
1723 
1724 IFX_INLINE void IfxVadc_startQueue(Ifx_VADC_G *group)
1725 {
1726  group->QMR0.B.TREV = 1;
1727 }
1728 
1729 
1731 {
1732  IfxPort_setPinModeOutput(emux->pin.port, emux->pin.pinIndex, outputMode, emux->select);
1733  IfxPort_setPinPadDriver(emux->pin.port, emux->pin.pinIndex, padDriver);
1734 }
1735 
1736 
1738 {
1739  IfxPort_setPinModeOutput(gxBfl->pin.port, gxBfl->pin.pinIndex, outputMode, gxBfl->select);
1740  IfxPort_setPinPadDriver(gxBfl->pin.port, gxBfl->pin.pinIndex, padDriver);
1741 }
1742 
1743 
1745 {
1746  uint32 ticks;
1747 
1748  ticks = (uint32)(sampleTime * analogFrequency) - 2;
1749 
1750  ticks = __minu(ticks, 0xFFu);
1751 
1752  return ticks;
1753 }
1754 
1755 
1757 {
1758  vadcG->REFCLR.U = 0x0000FFFFu;
1759 }
1760 
1761 
1763 {
1764  return (IfxVadc_ArbitrationRounds)vadcG->ARBCFG.B.ARBRND;
1765 }
1766 
1767 
1769 {
1770  Ifx_VADC_G_REVNP0 resultServiceRequestNodePtr0;
1771  resultServiceRequestNodePtr0.U = vadcG->REVNP0.U;
1772  return resultServiceRequestNodePtr0;
1773 }
1774 
1775 
1777 {
1778  Ifx_VADC_G_REVNP1 resultServiceRequestNodePtr1;
1779  resultServiceRequestNodePtr1.U = vadcG->REVNP1.U;
1780  return resultServiceRequestNodePtr1;
1781 }
1782 
1783 
1784 IFX_INLINE Ifx_VADC_G_CEVNP0 IfxVadc_getChannelServiceRequestNodePointer(Ifx_VADC_G *vadcG)
1785 {
1786  Ifx_VADC_G_CEVNP0 serviceRequestNodePtr;
1787  serviceRequestNodePtr.U = vadcG->CEVNP0.U;
1788  return serviceRequestNodePtr;
1789 }
1790 
1791 
1793 {
1794  uint8 masterIndex = 0;
1795  masterIndex = vadcG->SYNCTR.B.STSEL;
1796  return masterIndex;
1797 }
1798 
1799 
1800 IFX_INLINE void IfxVadc_resetGroup(Ifx_VADC_G *vadcG)
1801 {
1802  vadcG->ARBCFG.B.ANONC = IfxVadc_AnalogConverterMode_off; /* turn off group */
1803 }
1804 
1805 
1806 IFX_INLINE void IfxVadc_setAnalogConvertControl(Ifx_VADC_G *vadcG, IfxVadc_AnalogConverterMode analogConverterMode)
1807 {
1808  vadcG->ARBCFG.B.ANONC = analogConverterMode;
1809 }
1810 
1811 
1813 {
1814  vadcG->ARBCFG.B.ARBRND = arbiterRoundLength;
1815 }
1816 
1817 
1818 IFX_INLINE void IfxVadc_setInputClassResolution(Ifx_VADC_G *vadcG, uint8 inputClassNum, IfxVadc_ChannelResolution resolution)
1819 {
1820  vadcG->ICLASS[inputClassNum].B.CMS = resolution;
1821 }
1822 
1823 
1824 IFX_INLINE void IfxVadc_setInputClassSampleTimeTicks(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency, float32 sampleTime)
1825 {
1826  vadcG->ICLASS[inputClassNum].B.STCS = IfxVadc_calculateSampleTimeTicks(analogFrequency, sampleTime);
1827 }
1828 
1829 
1830 IFX_INLINE void IfxVadc_setMasterIndex(Ifx_VADC_G *vadcG, uint8 masterIndex)
1831 {
1832  vadcG->SYNCTR.B.STSEL = masterIndex;
1833  vadcG->SYNCTR.U |= (0x00000008U << masterIndex);
1834 }
1835 
1836 
1837 IFX_INLINE void IfxVadc_enableModule(Ifx_VADC *vadc)
1838 {
1840 
1841  IfxScuWdt_clearCpuEndinit(passwd);
1842  vadc->CLC.U = 0x00000000;
1843  IfxScuWdt_setCpuEndinit(passwd);
1844 }
1845 
1846 
1848 {
1849  uint8 status;
1850  status = vadc->G[adcCalGroupNum].ARBCFG.B.CAL;
1851  return status;
1852 }
1853 
1854 
1855 IFX_INLINE Ifx_VADC_GLOBCFG IfxVadc_getGlobalConfigValue(Ifx_VADC *vadc)
1856 {
1857  Ifx_VADC_GLOBCFG globCfg;
1858  globCfg.U = vadc->GLOBCFG.U;
1859  return globCfg;
1860 }
1861 
1862 
1864 {
1865  vadc->GLOBCFG.B.SUCAL = 1;
1866 }
1867 
1868 
1869 IFX_INLINE void IfxVadc_setChannelResolution(Ifx_VADC *vadc, uint8 groupInputClassNum, IfxVadc_ChannelResolution resolution)
1870 {
1871  vadc->GLOBICLASS[groupInputClassNum].B.CMS = resolution;
1872 }
1873 
1874 
1875 IFX_INLINE void IfxVadc_setSampleTimeTicks(Ifx_VADC *vadc, uint8 groupInputClassNum, float32 analogFrequency, float32 sampleTime)
1876 {
1877  vadc->GLOBICLASS[groupInputClassNum].B.STCS = IfxVadc_calculateSampleTimeTicks(analogFrequency, sampleTime);
1878 }
1879 
1880 
1882 {
1883  vadcG->CEFCLR.U = 1 << channelId;
1884 }
1885 
1886 
1887 IFX_INLINE void IfxVadc_enableFifoMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelResult resultRegister)
1888 {
1889  vadcG->RCR[resultRegister].B.SRGEN = 1;
1890 }
1891 
1892 
1893 IFX_INLINE Ifx_VADC_G_CHASS IfxVadc_getAssignedChannels(Ifx_VADC_G *vadcG)
1894 {
1895  Ifx_VADC_G_CHASS assignChannels;
1896  assignChannels.U = vadcG->CHASS.U;
1897  return assignChannels;
1898 }
1899 
1900 
1901 IFX_INLINE Ifx_VADC_CHCTR IfxVadc_getChannelControlConfig(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1902 {
1903  Ifx_VADC_CHCTR tempChctr;
1904  tempChctr.U = vadcG->CHCTR[channelIndex].U;
1905  return tempChctr;
1906 }
1907 
1908 
1910 {
1911  return (IfxVadc_ChannelResolution)vadcG->ICLASS[inputClassNum].B.CMS;
1912 }
1913 
1914 
1915 IFX_INLINE float32 IfxVadc_getChannelSampleTime(Ifx_VADC_G *vadcG, uint8 inputClassNum, float32 analogFrequency)
1916 {
1917  return (float32)vadcG->ICLASS[inputClassNum].B.STCS / analogFrequency;
1918 }
1919 
1920 
1922 {
1923  vadcG->CHASS.U &= ~(1 << channelIndex);
1924 }
1925 
1926 
1927 IFX_INLINE void IfxVadc_setBackgroundResultTarget(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean globalResultUsage)
1928 {
1929  vadcG->CHCTR[channelIndex].B.RESTBS = globalResultUsage;
1930 }
1931 
1932 
1933 IFX_INLINE void IfxVadc_setBoundaryMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundaryExtension boundaryMode)
1934 {
1935  vadcG->CHCTR[channelIndex].B.BNDSELX = boundaryMode;
1936 }
1937 
1938 
1939 IFX_INLINE void IfxVadc_setChannelEventSourceLine(Ifx_VADC_G *vadcG, IfxVadc_SrcNr channelSrcNr, IfxVadc_ChannelId channel)
1940 {
1941  vadcG->CEVNP0.U &= ~(IFX_VADC_G_CEVNP0_CEV0NP_MSK << channel);
1942  vadcG->CEVNP0.U |= (channelSrcNr << channel);
1943 }
1944 
1945 
1946 IFX_INLINE void IfxVadc_setChannelLimitCheckMode(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_LimitCheck limitCheck)
1947 {
1948  vadcG->CHCTR[channelIndex].B.CHEVMODE = limitCheck;
1949 }
1950 
1951 
1952 IFX_INLINE void IfxVadc_setGroupPriorityChannel(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex)
1953 {
1954  vadcG->CHASS.U |= (1 << channelIndex);
1955 }
1956 
1957 
1958 IFX_INLINE void IfxVadc_setInputClass(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_InputClasses inputClass)
1959 {
1960  vadcG->CHCTR[channelIndex].B.ICLSEL = inputClass;
1961 }
1962 
1963 
1964 IFX_INLINE void IfxVadc_setLowerBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection lowerBoundary)
1965 {
1966  vadcG->CHCTR[channelIndex].B.BNDSELL = lowerBoundary;
1967 }
1968 
1969 
1970 IFX_INLINE void IfxVadc_setReferenceInput(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelReference reference)
1971 {
1972  vadcG->CHCTR[channelIndex].B.REFSEL = reference;
1973 }
1974 
1975 
1976 IFX_INLINE void IfxVadc_setResultNodeEventPointer0(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
1977 {
1978  vadcG->REVNP0.U &= ~(IFX_VADC_G_REVNP0_REV0NP_MSK << (resultRegister * 4));
1979  vadcG->REVNP0.U |= (resultSrcNr << (resultRegister * 4));
1980 }
1981 
1982 
1983 IFX_INLINE void IfxVadc_setResultNodeEventPointer1(Ifx_VADC_G *vadcG, IfxVadc_SrcNr resultSrcNr, IfxVadc_ChannelResult resultRegister)
1984 {
1985  vadcG->REVNP1.U &= ~(IFX_VADC_G_REVNP1_REV8NP_MSK << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
1986  vadcG->REVNP1.U |= (resultSrcNr << ((resultRegister - IfxVadc_ChannelResult_8) * 4));
1987 }
1988 
1989 
1990 IFX_INLINE void IfxVadc_setResultPosition(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean rightAlignedStorage)
1991 {
1992  vadcG->CHCTR[channelIndex].B.RESPOS = rightAlignedStorage;
1993 }
1994 
1995 
1996 IFX_INLINE void IfxVadc_setSyncRequest(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, boolean synchonize)
1997 {
1998  vadcG->CHCTR[channelIndex].B.SYNC = synchonize;
1999 }
2000 
2001 
2002 IFX_INLINE void IfxVadc_setUpperBoundary(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_BoundarySelection upperBoundary)
2003 {
2004  vadcG->CHCTR[channelIndex].B.BNDSELU = upperBoundary;
2005 }
2006 
2007 
2008 IFX_INLINE void IfxVadc_storeGroupResult(Ifx_VADC_G *vadcG, IfxVadc_ChannelId channelIndex, IfxVadc_ChannelResult resultRegister)
2009 {
2010  vadcG->CHCTR[channelIndex].B.RESREG = resultRegister;
2011 }
2012 
2013 
2014 #endif /* IFXVADC_H */